Semiconductor & Computer Engineering
From WikiChip
Difference between revisions of "amd/am486/am486dx4-100nv8t"
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| model number = Am486DX4-100NV8T | | model number = Am486DX4-100NV8T | ||
| part number = A80486DX4-100NV8T | | part number = A80486DX4-100NV8T | ||
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| part number 2 = | | part number 2 = | ||
| part number 3 = | | part number 3 = | ||
| + | | part number 4 = | ||
| market = Desktop | | market = Desktop | ||
| first announced = | | first announced = | ||
Revision as of 16:11, 30 June 2017
Template:mpu Am486DX2-100NV8T was an 80486-compatible microprocessor introduced by AMD in 1995 following the conclusion of the legal battle with Intel. This processor had a clock multiplier of 3 having base frequency of 100 MHz with a bus frequency of 33 MHz. This model is is a modified version of Am486DX4-100V8T (and earlier Am486DX4-100) that no longer included Intel's ICE microcode.
Cache
- Main article: 80486 § Cache
| Cache Info [Edit Values] | ||
| L1$ | 8 KiB 8,192 B 0.00781 MiB |
1x8 KiB 4-way set associative (unified, write-through policy) |
Graphics
This chip had no integrated graphics processing unit.
Documents
Gallery
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Die Shot
See also
Facts about "Am486DX4-100NV8T - AMD"
| l1$ description | 4-way set associative + |
| l1$ size | 8 KiB (8,192 B, 0.00781 MiB) + |