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Difference between revisions of "compaq/microarchitectures/alpha 21364"

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|speculative=Yes
 
|speculative=Yes
 
|renaming=Yes
 
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|decode=4-way
 
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|successor link=compaq/microarchitectures/alpha_21464
 
|successor link=compaq/microarchitectures/alpha_21464
 
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'''Alpha 21364''' was an [[Alpha]] microarchitecture designed by [[Compaq]] after acquiring it from [[DEC]] and introduced in 1998 as a successor to the {{\\|Alpha 21264}} architecture.
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'''Alpha 21364''' was an [[Alpha]] microarchitecture designed by [[Compaq]] after acquiring it from [[DEC]] and introduced in 2002 as a successor to the {{\\|Alpha 21264}} architecture.
  
 
== History ==
 
== History ==
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{{clear}}
 
{{clear}}
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== Documents ==
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* [[:File:Alpha 21364 (EV7) (January 4, 2002).pdf|Alpha 21364 (EV7)]], January 4, 2002
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* [[:File:ev7SMP.ppt|Alpha 21364: A Scalable Single-chip SMP (PPT)]] ([[:File:ev7SMP.pdf|PDF Version]]), 1998
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* [[:File:alpha 21464.ppt|The Alpha 21364 and 21464 Microprocessors: Continuing the Performance Lead Beyond Y2K (PPT)]] ([[:File:alpha 21464.pdf|PDF Version]])
  
 
== References ==
 
== References ==
 
* "Alpha 21364 (EV7)", Compaq presentation
 
* "Alpha 21364 (EV7)", Compaq presentation
 
* Tsuk, M., et al. "Modeling and measurement of the Alpha 21364 package." Electrical Performance of Electronic Packaging, 2001. IEEE, 2001.
 
* Tsuk, M., et al. "Modeling and measurement of the Alpha 21364 package." Electrical Performance of Electronic Packaging, 2001. IEEE, 2001.

Latest revision as of 19:41, 14 June 2017

Edit Values
Alpha 21364 µarch
General Info
Arch TypeCPU
DesignerDEC, Compaq
ManufacturerIBM
IntroductionJanuary 20, 2002
Process0.18 µm
Core Configs1
Pipeline
TypeSuperscalar
OoOEYes
SpeculativeYes
Reg RenamingYes
Stages7
Decode4-way
Instructions
ISAAlpha
Cache
L1I Cache64 KiB/core
2-way set associative
L1D Cache64 KiB/core
2-way set associative
L2 Cache1.75 MiB/core
7-way set associative
Succession

Alpha 21364 was an Alpha microarchitecture designed by Compaq after acquiring it from DEC and introduced in 2002 as a successor to the Alpha 21264 architecture.

History[edit]

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Process Technology[edit]

See also: 0.18 µm process
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Architecture[edit]

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Die[edit]

  • 1,250 MHz
  • 135 Watts (155 W peak) @ 1.65 volts
  • 0.18 µm process
  • 7 metal layers (copper interconnect)
  • 152,000,000 transistors
    • 15,000,000 logic
    • 137,000,000 cache
  • 21.1 mm x 18.8 mm
  • 396.68 mm² die size
  • PGA-1443 package
    • 946 signal pins


alpha 21364 die shot.png


alpha 21364 die shot (annotated).png

Core[edit]

alpha 21364 core.png
alpha 21364 core (annotated).png

Documents[edit]

References[edit]

  • "Alpha 21364 (EV7)", Compaq presentation
  • Tsuk, M., et al. "Modeling and measurement of the Alpha 21364 package." Electrical Performance of Electronic Packaging, 2001. IEEE, 2001.
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Facts about "Alpha 21364 - Microarchitectures - Compaq"
RDF feed
codenameAlpha 21364 +
core count1 +
designerDEC + and Compaq +
first launchedJanuary 20, 2002 +
full page namecompaq/microarchitectures/alpha 21364 +
instance ofmicroarchitecture +
instruction set architectureAlpha +
manufacturerIBM +
microarchitecture typeCPU +
nameAlpha 21364 +
pipeline stages7 +
process180 nm (0.18 μm, 1.8e-4 mm) +