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Difference between revisions of "intel/xeon gold/6150"
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(Created page with "{{intel title|Xeon Gold 6150}}")
 
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{{intel title|Xeon Gold 6150}}
 
{{intel title|Xeon Gold 6150}}
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{{mpu
 +
| future              = Yes
 +
| name                = Xeon Gold 6150
 +
| no image            = Yes
 +
| image              =
 +
| image size          =
 +
| caption            =
 +
| designer            = Intel
 +
| manufacturer        = Intel
 +
| model number        = 6150
 +
| part number        = CD8067303328000
 +
| part number 1      =
 +
| part number 2      =
 +
| s-spec              = SR37K
 +
| s-spec 2            =
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| market              = Server
 +
| first announced    = April 25, 2017
 +
| first launched      =
 +
| last order          =
 +
| last shipment      =
 +
| release price      =
 +
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| family              = Xeon Gold
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| series              = 6100
 +
| locked              = Yes
 +
| frequency          = 2.7 GHz
 +
| turbo frequency    =
 +
| turbo frequency1    =
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| turbo frequency2    =
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| turbo frequency3    =
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| turbo frequency4    =
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| turbo frequency5    =
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| turbo frequency6    =
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| turbo frequency7    =
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| turbo frequency8    =
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| bus type            = DMI 3.0
 +
| bus speed          =
 +
| bus rate            = 8 GT/s
 +
| bus links          = 4
 +
| clock multiplier    = 27
 +
| cpuid              =
 +
| cpuid 2            =
 +
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| isa family          = x86-64
 +
| isa                = x86
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| microarch          = Skylake
 +
| platform            = Purley
 +
| chipset            = Lewisburg
 +
| core name          = Skylake SP
 +
| core family        =
 +
| core model          =
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| core stepping      = H0
 +
| process            = 14 nm
 +
| transistors        =
 +
| technology          = CMOS
 +
| die area            = <!-- XX mm² -->
 +
| die width          =
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| die length          =
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| word size          = 64 bit
 +
| core count          =
 +
| thread count        =
 +
| max cpus            =
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| max memory          =
 +
 +
| electrical          =
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| power              =
 +
| average power      =
 +
| idle power          =
 +
| v core              =
 +
| v core tolerance    = <!-- OR ... -->
 +
| v core min          =
 +
| v core max          =
 +
| v io                =
 +
| v io tolerance      =
 +
| v io 2              = <!-- OR ... -->
 +
| v io 3              =
 +
| sdp                =
 +
| tdp                =
 +
| tdp typical        =
 +
| ctdp down          =
 +
| ctdp down frequency =
 +
| ctdp up            =
 +
| ctdp up frequency  =
 +
| temp min            = <!-- use TJ/TC whenever possible instead -->
 +
| temp max            =
 +
| tjunc min          = <!-- .. °C -->
 +
| tjunc max          =
 +
| tcase min          =
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| tcase max          =
 +
| tstorage min        =
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| tstorage max        =
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| tambient min        =
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| tambient max        =
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 +
| package module 1    =
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| package module 2    =
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<!-------- USE ONLY IF MUST, OTHERWISE TRY TO USE MODULE ABOVE -------------->
 +
| packaging          = Yes
 +
| package 0          = FCLGA-3647
 +
| package 0 type      = LGA
 +
| package 0 pins      = 3647
 +
| package 0 pitch    =
 +
| package 0 width    =
 +
| package 0 length    =
 +
| package 0 height    =
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| socket 0            = LGA-3647
 +
| socket 0 type      = LGA
 +
}}

Revision as of 00:48, 10 May 2017

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