Semiconductor & Computer Engineering
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Difference between revisions of "intel/xeon gold/6130t"
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{{intel title|Xeon Gold 6130T}} | {{intel title|Xeon Gold 6130T}} | ||
| + | {{mpu | ||
| + | | future = Yes | ||
| + | | name = Xeon Gold 6130T | ||
| + | | no image = Yes | ||
| + | | image = | ||
| + | | image size = | ||
| + | | caption = | ||
| + | | designer = Intel | ||
| + | | manufacturer = Intel | ||
| + | | model number = 6130T | ||
| + | | part number = CD8067303593000 | ||
| + | | part number 1 = | ||
| + | | part number 2 = | ||
| + | | s-spec = SR3J8 | ||
| + | | s-spec 2 = | ||
| + | | market = Server | ||
| + | | first announced = April 25, 2017 | ||
| + | | first launched = | ||
| + | | last order = | ||
| + | | last shipment = | ||
| + | | release price = | ||
| + | |||
| + | | family = Xeon Gold | ||
| + | | series = 6100 | ||
| + | | locked = Yes | ||
| + | | frequency = 2.1 GHz | ||
| + | | turbo frequency = | ||
| + | | turbo frequency1 = | ||
| + | | turbo frequency2 = | ||
| + | | turbo frequency3 = | ||
| + | | turbo frequency4 = | ||
| + | | turbo frequency5 = | ||
| + | | turbo frequency6 = | ||
| + | | turbo frequency7 = | ||
| + | | turbo frequency8 = | ||
| + | | bus type = DMI 3.0 | ||
| + | | bus speed = | ||
| + | | bus rate = 8 GT/s | ||
| + | | bus links = 4 | ||
| + | | clock multiplier = 21 | ||
| + | | cpuid = | ||
| + | | cpuid 2 = | ||
| + | |||
| + | | isa family = x86-64 | ||
| + | | isa = x86 | ||
| + | | microarch = Skylake | ||
| + | | platform = Purley | ||
| + | | chipset = Lewisburg | ||
| + | | core name = Skylake SP | ||
| + | | core family = | ||
| + | | core model = | ||
| + | | core stepping = H0 | ||
| + | | process = 14 nm | ||
| + | | transistors = | ||
| + | | technology = CMOS | ||
| + | | die area = <!-- XX mm² --> | ||
| + | | die width = | ||
| + | | die length = | ||
| + | | word size = 64 bit | ||
| + | | core count = | ||
| + | | thread count = | ||
| + | | max cpus = | ||
| + | | max memory = | ||
| + | |||
| + | | electrical = | ||
| + | | power = | ||
| + | | average power = | ||
| + | | idle power = | ||
| + | | v core = | ||
| + | | v core tolerance = <!-- OR ... --> | ||
| + | | v core min = | ||
| + | | v core max = | ||
| + | | v io = | ||
| + | | v io tolerance = | ||
| + | | v io 2 = <!-- OR ... --> | ||
| + | | v io 3 = | ||
| + | | sdp = | ||
| + | | tdp = | ||
| + | | tdp typical = | ||
| + | | ctdp down = | ||
| + | | ctdp down frequency = | ||
| + | | ctdp up = | ||
| + | | ctdp up frequency = | ||
| + | | temp min = <!-- use TJ/TC whenever possible instead --> | ||
| + | | temp max = | ||
| + | | tjunc min = <!-- .. °C --> | ||
| + | | tjunc max = | ||
| + | | tcase min = | ||
| + | | tcase max = | ||
| + | | tstorage min = | ||
| + | | tstorage max = | ||
| + | | tambient min = | ||
| + | | tambient max = | ||
| + | |||
| + | | package module 1 = | ||
| + | | package module 2 = | ||
| + | <!-------- USE ONLY IF MUST, OTHERWISE TRY TO USE MODULE ABOVE --------------> | ||
| + | | packaging = Yes | ||
| + | | package 0 = FCLGA-3647 | ||
| + | | package 0 type = LGA | ||
| + | | package 0 pins = 3647 | ||
| + | | package 0 pitch = | ||
| + | | package 0 width = | ||
| + | | package 0 length = | ||
| + | | package 0 height = | ||
| + | | socket 0 = LGA-3647 | ||
| + | | socket 0 type = LGA | ||
| + | }} | ||