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Difference between revisions of "loongson/godson 2/2b"
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'''Godson-2B''' ('''龙芯2B''') is a {{arch|64}} [[MIPS]] performance processor developed by [[Institute of Computing Technology of the Chinese Academy of Sciences|ICT]] and later [[Loongson]] for desktop computers. Introduced in late [[2003]], the Godson-2B operates at up to 250 MHz consuming up to 3 W. This chip was manufactured on [[SMICS]]' [[0.18 µm process]] and is known as China's first {{arch|64}} microprocessor.
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'''Godson-2B''' ('''龙芯2B''') is a {{arch|64}} [[MIPS]] performance processor developed by [[Institute of Computing Technology of the Chinese Academy of Sciences|ICT]] and later [[Loongson]] for desktop computers. Introduced in late [[2003]], the Godson-2B operates at up to 300 MHz consuming up to 3 W. This chip was manufactured on [[SMICS]]' [[0.18 µm process]] and is known as China's first {{arch|64}} microprocessor.
  
 
== Cache ==
 
== Cache ==

Revision as of 20:19, 19 March 2017

Template:mpu Godson-2B (龙芯2B) is a 64-bit MIPS performance processor developed by ICT and later Loongson for desktop computers. Introduced in late 2003, the Godson-2B operates at up to 300 MHz consuming up to 3 W. This chip was manufactured on SMICS' 0.18 µm process and is known as China's first 64-bit microprocessor.

Cache

Main article: GS464 § Cache

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$64 KiB
65,536 B
0.0625 MiB
L1I$32 KiB
32,768 B
0.0313 MiB
1x32 KiB  
L1D$32 KiB
32,768 B
0.0313 MiB
1x32 KiB  
Retrieved from "https://en.wikichip.org/w/index.php?title=loongson/godson_2/2b&oldid=39922"
Facts about "Godson-2B - Loongson"
RDF feed
base frequency300 MHz (0.3 GHz, 300,000 kHz) +
core count1 +
core nameGS464 +
designerLoongson +
familyGodson 2 +
first announced2003 +
first launchedOctober 17, 2003 +
full page nameloongson/godson 2/2b +
instance ofmicroprocessor +
isaMIPS64 +
isa familyMIPS +
l1$ size64 KiB (65,536 B, 0.0625 MiB) +
l1d$ size32 KiB (32,768 B, 0.0313 MiB) +
l1i$ size32 KiB (32,768 B, 0.0313 MiB) +
ldateOctober 17, 2003 +
main imageFile:godson-2b.png +
main image captionGodson-2B chip +
manufacturerSMICS +
market segmentDesktop +
max cpu count1 +
microarchitectureGS464 +
model number2B +
nameGodson-2B +
part numberMZD110 +
power dissipation3 W (3,000 mW, 0.00402 hp, 0.003 kW) +
process180 nm (0.18 μm, 1.8e-4 mm) +
seriesGodson 2 +
smp max ways1 +
technologyCMOS +
thread count1 +
word size64 bit (8 octets, 16 nibbles) +