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    Difference between revisions of "intel/xeon e3/e3-1225 v6"    
                	
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| | manufacturer        = Intel | | manufacturer        = Intel | ||
| | model number        = E3-1225 v6 | | model number        = E3-1225 v6 | ||
| − | | part number         =   | + | | part number         = CM8067702871024 | 
| − | | part number 2       =  | + | | part number 2       =   | 
| + | | s-spec              =  | ||
| | market              = Workstation | | market              = Workstation | ||
| | first announced     =   | | first announced     =   | ||
| Line 30: | Line 31: | ||
| | bus speed           =   | | bus speed           =   | ||
| | bus rate            = 8 GT/s | | bus rate            = 8 GT/s | ||
| − | |  | + | | bus links           =   | 
| − | + | | clock multiplier    = 33 | |
| − | |||
| − | |  | ||
| | cpuid               =   | | cpuid               =   | ||
| + | | isa family          = x86 | ||
| + | | isa                 = x86-64 | ||
| | microarch           = Kaby Lake | | microarch           = Kaby Lake | ||
| − | | platform            =   | + | | platform            = Greenlow | 
| − | | chipset             =   | + | | chipset             = Sunrise Point | 
| − | | core name           =   | + | | chipset 2           = Union Point | 
| + | | core name           = Kaby Lake DT | ||
| | core family         =   | | core family         =   | ||
| | core model          =   | | core model          =   | ||
| | core stepping       =   | | core stepping       =   | ||
| + | | core stepping 2     =  | ||
| | process             = 14 nm | | process             = 14 nm | ||
| | transistors         =   | | transistors         =   | ||
| | technology          = CMOS | | technology          = CMOS | ||
| − | | die  | + | | die area            =  | 
| + | | die width           =  | ||
| + | | die length          =   | ||
| | word size           = 64 bit | | word size           = 64 bit | ||
| | core count          = 4 | | core count          = 4 | ||
| − | | thread count        =  | + | | thread count        = 8 | 
| | max cpus            = 1 | | max cpus            = 1 | ||
| | max memory          = 64 GiB | | max memory          = 64 GiB | ||
| | electrical          = Yes | | electrical          = Yes | ||
| − | | v core  | + | | v core min          =   | 
| − | | v core  | + | | v core max          =   | 
| | sdp                 =   | | sdp                 =   | ||
| | tdp                 = 78 W | | tdp                 = 78 W | ||
| + | | tdp typical         =  | ||
| | ctdp down           =   | | ctdp down           =   | ||
| − | | ctdp down frequency = | + | | ctdp down frequency =   | 
| − | | ctdp up             = | + | | ctdp up             =   | 
| − | | ctdp up frequency   = | + | | ctdp up frequency   =   | 
| − | |  | + | | tjunc min           =  | 
| − | |  | + | | tjunc max           =  | 
| + | | tcase min           =  | ||
| + | | tcase max           =  | ||
| + | | tstorage min        = -25 °C | ||
| + | | tstorage max        = 125 °C | ||
| + | | tambient min        =  | ||
| + | | tambient max        =   | ||
| − | + | | package module 1    = {{packages/intel/lga-1151}} | |
| − | |||
| − | | package  | ||
| − | |||
| − | |||
| − | |||
| }} | }} | ||
| − | + | '''Xeon E3-1225 v6''' is a {{arch|64}} [[quad-core]] [[x86]] workstation/entry server microprocessor set to be introduced by [[Intel]] in early [[2017]]. This chip, which is based on the {{intel|Kaby Lake|l=arch}} microarchitecture, is fabricated on Intel's [[14 nm process|14nm+ process]]. The E3-1225 v6 operates at 3.3 GHz with a TDP of 78 W supporting a {{intel|Turbo Boost}} frequency of ? GHz. The processor supports up to 64 GiB of dual-channel DDR4-2400 ECC memory and incorporates Intel's {{intel|HD Graphics P630}} [[IGP]] operating at 400 MHz with a burst frequency of ? GHz. | |
Revision as of 04:09, 18 January 2017
Template:mpu Xeon E3-1225 v6 is a 64-bit quad-core x86 workstation/entry server microprocessor set to be introduced by Intel in early 2017. This chip, which is based on the Kaby Lake microarchitecture, is fabricated on Intel's 14nm+ process. The E3-1225 v6 operates at 3.3 GHz with a TDP of 78 W supporting a Turbo Boost frequency of ? GHz. The processor supports up to 64 GiB of dual-channel DDR4-2400 ECC memory and incorporates Intel's HD Graphics P630 IGP operating at 400 MHz with a burst frequency of ? GHz.
Cache
- Main article: Kaby Lake § Cache
|  | Cache Organization  Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. | ||||||||||||||||||||||||||||||||||||
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Memory controller
|  | Integrated Memory Controller | |||||||||||||
| 
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Expansions
|  | Expansion Options | |||||||
| 
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Graphics
|  | Integrated Graphics Information | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
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| [Edit] Kaby Lake (Gen9.5) Hardware Accelerated Video Capabilities | |||||||
|---|---|---|---|---|---|---|---|
| Codec | Encode | Decode | |||||
| Profiles | Levels | Max Resolution | Profiles | Levels | Max Resolution | ||
| MPEG-2 (H.262) | Main | High | 1080p (FHD) | Main | Main, High | 1080p (FHD) | |
| MPEG-4 AVC (H.264) | High, Main | 5.1 | 2160p (4K) | Main, High, MVC, Stereo | 5.1 | 2160p (4K) | |
| JPEG/MJPEG | Baseline | - | 16k x 16k | Baseline | Unified | 16k x 16k | |
| HEVC (H.265) | Main, Main 10 | 5.1 | 2160p (4K) | Main, Main 10 | 5.1 | 2160p (4K) | |
| VC-1 | ✘ | Advanced, Main, Simple | 3, High, Simple | 3840x3840 | |||
| VP8 | Unified | Unified | N/A | 0 | Unified | 1080p | |
| VP9 | 0 | 2160p (4K) | 0, 2 | Unified | 2160p (4K) | ||
Features
[Edit/Modify Supported Features]
Facts about "Xeon E3-1225 v6  - Intel"
| Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Xeon E3-1225 v6 - Intel#io + | 
| device id | 0x591D + | 
| has advanced vector extensions | true + | 
| has advanced vector extensions 2 | true + | 
| has ecc memory support | true + | 
| has extended page tables support | true + | 
| has feature | Advanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Encryption Standard Instruction Set Extension +, Hyper-Threading Technology +, Turbo Boost Technology 2.0 +, Enhanced SpeedStep Technology +, Speed Shift Technology +, Trusted Execution Technology +, Intel vPro Technology +, Intel VT-x +, Intel VT-d +, Extended Page Tables +, Transactional Synchronization Extensions +, Memory Protection Extensions +, Software Guard Extensions +, Secure Key Technology +, OS Guard +, Flex Memory Access +, Smart Response Technology +, My WiFi Technology + and Stable Image Platform Program + | 
| has intel enhanced speedstep technology | true + | 
| has intel flex memory access support | true + | 
| has intel my wifi technology support | true + | 
| has intel secure key technology | true + | 
| has intel smart response technology support | true + | 
| has intel speed shift technology | true + | 
| has intel stable image platform program support | true + | 
| has intel supervisor mode execution protection | true + | 
| has intel trusted execution technology | true + | 
| has intel turbo boost technology 2 0 | true + | 
| has intel vpro technology | true + | 
| has intel vt-d technology | true + | 
| has intel vt-x technology | true + | 
| has second level address translation support | true + | 
| has simultaneous multithreading | true + | 
| has transactional synchronization extensions | true + | 
| has x86 advanced encryption standard instruction set extension | true + | 
| integrated gpu | HD Graphics P630 + | 
| integrated gpu base frequency | 400 MHz (0.4 GHz, 400,000 KHz) + | 
| integrated gpu designer | Intel + | 
| integrated gpu execution units | 24 + | 
| integrated gpu max frequency | 1,150 MHz (1.15 GHz, 1,150,000 KHz) + | 
| integrated gpu max memory | 65,536 MiB (67,108,864 KiB, 68,719,476,736 B, 64 GiB) + | 
| l1$ size | 256 KiB (262,144 B, 0.25 MiB) + | 
| l1d$ description | 8-way set associative + | 
| l1d$ size | 128 KiB (131,072 B, 0.125 MiB) + | 
| l1i$ description | 8-way set associative + | 
| l1i$ size | 128 KiB (131,072 B, 0.125 MiB) + | 
| l2$ description | 4-way set associative + | 
| l2$ size | 1 MiB (1,024 KiB, 1,048,576 B, 9.765625e-4 GiB) + | 
| l3$ description | 16-way set associative + | 
| l3$ size | 8 MiB (8,192 KiB, 8,388,608 B, 0.00781 GiB) + | 
| max memory bandwidth | 35.76 GiB/s (36,618.24 MiB/s, 38.397 GB/s, 38,397.008 MB/s, 0.0349 TiB/s, 0.0384 TB/s) + | 
| max memory channels | 2 + | 
| max pcie lanes | 16 + | 
| supported memory type | DDR3L-1600 +, LPDDR3-2133 + and DDR4-2400 + | 
| x86/has memory protection extensions | true + | 
| x86/has software guard extensions | true + | 

