Semiconductor & Computer Engineering
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Difference between revisions of "intel/core i5/i5-7y54"
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== Features == | == Features == | ||
| − | {{ | + | {{x86 features |
| − | | | + | |real=Yes |
| − | | nx | + | |protected=Yes |
| − | | | + | |smm=Yes |
| − | | | + | |fpu=Yes |
| − | | | + | |x8616=Yes |
| − | | | + | |x8632=Yes |
| − | | | + | |x8664=Yes |
| − | | | + | |nx=Yes |
| − | | | + | |3dnow=No |
| − | | | + | |e3dnow=No |
| − | | | + | |mmx=Yes |
| − | | | + | |emmx=Yes |
| − | | | + | |sse=Yes |
| − | | | + | |sse2=Yes |
| − | | | + | |sse3=Yes |
| − | | | + | |ssse3=Yes |
| − | | | + | |sse41=Yes |
| − | | | + | |sse42=Yes |
| − | | | + | |sse4a=Yes |
| − | | | + | |avx=Yes |
| − | | | + | |avx2=Yes |
| − | | | + | |avx512=No |
| − | | | + | |abm=Yes |
| − | | | + | |tbm=No |
| − | | | + | |bmi1=Yes |
| − | | | + | |bmi2=Yes |
| − | | | + | |fma3=Yes |
| − | | | + | |fma4=No |
| − | | | + | |aes=Yes |
| − | | mpx | + | |rdrand=Yes |
| − | | sgx | + | |sha=No |
| − | | | + | |xop=No |
| − | | | + | |adx=Yes |
| − | | | + | |clmul=Yes |
| − | | | + | |f16c=Yes |
| + | |tbt1=No | ||
| + | |tbt2=Yes | ||
| + | |tbmt3=No | ||
| + | |bpt=No | ||
| + | |eist=Yes | ||
| + | |sst=Yes | ||
| + | |flex=Yes | ||
| + | |fastmem=No | ||
| + | |isrt=Yes | ||
| + | |sba=No | ||
| + | |mwt=Yes | ||
| + | |sipp=No | ||
| + | |att=No | ||
| + | |ipt=No | ||
| + | |tsx=No | ||
| + | |txt=No | ||
| + | |ht=No | ||
| + | |vpro=No | ||
| + | |vtx=Yes | ||
| + | |vtd=Yes | ||
| + | |ept=Yes | ||
| + | |mpx=Yes | ||
| + | |sgx=Yes | ||
| + | |securekey=Yes | ||
| + | |osguard=Yes | ||
| + | |smartmp=No | ||
| + | |powernow=No | ||
| + | |amdv=No | ||
| + | |rvi=No | ||
}} | }} | ||
Revision as of 18:30, 6 January 2017
Template:mpu Core i5-7Y54 is a 64-bit dual-core mid-range performance x86 mobile microprocessor introduced by Intel in early 2017. This chip, which is based on the Kaby Lake microarchitecture, is fabricated on Intel's 14nm+ process. The i5-7Y54 operates at 1.2 GHz with a TDP of 4.5 W supporting a Turbo Boost frequency of 3.2 GHz. The processor supports up to 16 GiB of dual-channel non-ECC LPDDR3-1866 memory and incorporates Intel's HD Graphics 615 IGP operating at 300 MHz with a burst frequency of 950 MHz.
Cache
- Main article: Kaby Lake § Cache
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Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
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Memory controller
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Integrated Memory Controller
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Expansions
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Expansion Options
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Graphics
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Integrated Graphics Information
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Features
[Edit/Modify Supported Features]
Facts about "Core i5-7Y54 - Intel"
| Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Core i5-7Y54 - Intel#io + |
| device id | 0x591E + |
| has ecc memory support | false + |
| integrated gpu | HD Graphics 615 + |
| integrated gpu base frequency | 300 MHz (0.3 GHz, 300,000 KHz) + |
| integrated gpu designer | Intel + |
| integrated gpu execution units | 24 + |
| integrated gpu max frequency | 950 MHz (0.95 GHz, 950,000 KHz) + |
| integrated gpu max memory | 16,384 MiB (16,777,216 KiB, 17,179,869,184 B, 16 GiB) + |
| l1$ size | 128 KiB (131,072 B, 0.125 MiB) + |
| l1d$ description | 8-way set associative + |
| l1d$ size | 64 KiB (65,536 B, 0.0625 MiB) + |
| l1i$ description | 8-way set associative + |
| l1i$ size | 64 KiB (65,536 B, 0.0625 MiB) + |
| l2$ description | 4-way set associative + |
| l2$ size | 0.5 MiB (512 KiB, 524,288 B, 4.882812e-4 GiB) + |
| l3$ description | 12-way set associative + |
| l3$ size | 4 MiB (4,096 KiB, 4,194,304 B, 0.00391 GiB) + |
| max memory bandwidth | 27.81 GiB/s (28,477.44 MiB/s, 29.861 GB/s, 29,860.76 MB/s, 0.0272 TiB/s, 0.0299 TB/s) + |
| max memory channels | 2 + |
| max pcie lanes | 10 + |
| supported memory type | DDR3L-1600 + and LPDDR3-1866 + |