Semiconductor & Computer Engineering
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Difference between revisions of "intel/core i5/i5-7200u"
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== Graphics == | == Graphics == | ||
| − | {{integrated | + | {{integrated graphics |
| − | | gpu | + | | gpu = HD Graphics 620 |
| − | | device id | + | | device id = 0x5916 |
| − | | execution units | + | | designer = Intel |
| − | | displays | + | | execution units = 24 |
| − | | frequency | + | | max displays = 3 |
| − | | max frequency | + | | max memory = 32 GiB |
| − | + | | frequency = 300 MHz | |
| + | | max frequency = 1,000 MHz | ||
| output crt = | | output crt = | ||
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| max res vga freq = | | max res vga freq = | ||
| − | | intel quick sync | + | | features = Yes |
| − | | intel intru 3d | + | | intel quick sync = Yes |
| − | | intel insider | + | | intel intru 3d = Yes |
| − | | intel widi | + | | intel insider = |
| − | | intel fdi | + | | intel widi = |
| − | | intel clear video | + | | intel fdi = |
| + | | intel clear video = Yes | ||
| + | | intel clear video hd = Yes | ||
}} | }} | ||
Revision as of 18:17, 6 January 2017
Template:mpu Core i5-7200U is a 64-bit dual-core mid-range performance x86 mobile microprocessor introduced by Intel in early 2017. This chip, which is based on the Kaby Lake microarchitecture, is fabricated on Intel's 14nm+ process. The i5-7200U operates at 2.5 GHz with a TDP of 3.1 W supporting a Turbo Boost frequency of 3.1 GHz. The processor supports up to 32 GiB of dual-channel non-ECC DDR4-2133 memory and incorporates Intel's HD Graphics 620 IGP operating at 300 MHz with a burst frequency of 1 GHz.
Cache
- Main article: Kaby Lake § Cache
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Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
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Memory controller
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Integrated Memory Controller
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Expansions
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Expansion Options
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Graphics
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Integrated Graphics Information
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Features
Facts about "Core i5-7200U - Intel"
| Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Core i5-7200U - Intel#io + |
| device id | 0x5916 + |
| has ecc memory support | false + |
| integrated gpu | HD Graphics 620 + |
| integrated gpu base frequency | 300 MHz (0.3 GHz, 300,000 KHz) + |
| integrated gpu designer | Intel + |
| integrated gpu execution units | 24 + |
| integrated gpu max frequency | 1,000 MHz (1 GHz, 1,000,000 KHz) + |
| integrated gpu max memory | 32,768 MiB (33,554,432 KiB, 34,359,738,368 B, 32 GiB) + |
| l1$ size | 128 KiB (131,072 B, 0.125 MiB) + |
| l1d$ description | 8-way set associative + |
| l1d$ size | 64 KiB (65,536 B, 0.0625 MiB) + |
| l1i$ description | 8-way set associative + |
| l1i$ size | 64 KiB (65,536 B, 0.0625 MiB) + |
| l2$ description | 4-way set associative + |
| l2$ size | 0.5 MiB (512 KiB, 524,288 B, 4.882812e-4 GiB) + |
| l3$ description | 12-way set associative + |
| l3$ size | 3 MiB (3,072 KiB, 3,145,728 B, 0.00293 GiB) + |
| max memory bandwidth | 31.79 GiB/s (32,552.96 MiB/s, 34.134 GB/s, 34,134.253 MB/s, 0.031 TiB/s, 0.0341 TB/s) + |
| max memory channels | 2 + |
| max pcie lanes | 12 + |
| supported memory type | LPDDR3-1866 +, DDR3L-1600 + and DDR4-2133 + |