From WikiChip
Difference between revisions of "intel/core i5/i5-7200u"
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| manufacturer = Intel | | manufacturer = Intel | ||
| model number = i5-7200U | | model number = i5-7200U | ||
− | | part number = | + | | part number = FJ8067702739739 |
| part number 1 = | | part number 1 = | ||
| part number 2 = | | part number 2 = | ||
− | | | + | | s-spec = SR342 |
+ | | s-spec = SR2ZU | ||
| market = Mobile | | market = Mobile | ||
| first announced = August 30, 2016 | | first announced = August 30, 2016 | ||
Line 21: | Line 22: | ||
| family = Core i5 | | family = Core i5 | ||
− | | series = | + | | series = i5-7200 |
− | | locked = | + | | locked = Yes |
− | | frequency = | + | | frequency = 2,500 MHz |
| turbo frequency = Yes | | turbo frequency = Yes | ||
− | | turbo frequency1 = | + | | turbo frequency1 = 3,100 MHz |
| turbo frequency2 = | | turbo frequency2 = | ||
− | | bus type = | + | | turbo frequency3 = |
+ | | turbo frequency4 = | ||
+ | | bus type = OPI | ||
| bus speed = | | bus speed = | ||
− | | bus rate = | + | | bus rate = 4 GT/s |
+ | | bus links = | ||
| clock multiplier = 25 | | clock multiplier = 25 | ||
− | |||
− | |||
− | |||
− | |||
− | |||
| cpuid = | | cpuid = | ||
− | |||
| isa family = x86 | | isa family = x86 | ||
| isa = x86-64 | | isa = x86-64 | ||
| microarch = Kaby Lake | | microarch = Kaby Lake | ||
− | | platform = | + | | platform = Kaby Lake |
− | | chipset = | + | | chipset = Sunrise Point |
+ | | chipset 2 = Union Point | ||
| core name = Kaby Lake U | | core name = Kaby Lake U | ||
− | | core family = | + | | core family = 6 |
− | | core model = | + | | core model = 142 |
| core stepping = | | core stepping = | ||
| core stepping 2 = | | core stepping 2 = | ||
− | |||
| process = 14 nm | | process = 14 nm | ||
| transistors = | | transistors = | ||
Line 60: | Line 58: | ||
| thread count = 4 | | thread count = 4 | ||
| max cpus = 1 | | max cpus = 1 | ||
− | | max memory = 32 | + | | max memory = 32 GiB |
− | |||
| electrical = Yes | | electrical = Yes | ||
− | + | | v core min = 0.55 V | |
− | | v core | + | | v core max = 1.52 V |
− | | v core | ||
− | |||
− | |||
| sdp = | | sdp = | ||
| tdp = 15 W | | tdp = 15 W | ||
+ | | tdp typical = | ||
| ctdp down = 7.5 W | | ctdp down = 7.5 W | ||
| ctdp down frequency = 800 MHz | | ctdp down frequency = 800 MHz | ||
− | | ctdp up = | + | | ctdp up = 2,700 MHz |
− | | ctdp up frequency = | + | | ctdp up frequency = 25 W |
− | |||
− | |||
| tjunc min = 0 °C | | tjunc min = 0 °C | ||
| tjunc max = 100 °C | | tjunc max = 100 °C | ||
| tcase min = | | tcase min = | ||
| tcase max = | | tcase max = | ||
− | | tstorage min = | + | | tstorage min = -25 °C |
− | | tstorage max = | + | | tstorage max = 125 °C |
+ | | tambient min = | ||
+ | | tambient max = | ||
− | | packaging | + | | packaging = Yes |
− | | package | + | | package = FCBGA-1356 |
− | | package | + | | package type = FCBGA |
− | | package | + | | package pitch = 0.65 mm |
− | + | | package size = 42 mm x 24 mm | |
− | | package | + | | socket = BGA-1356 |
− | + | | socket type = BGA | |
− | |||
− | | socket | ||
− | | socket | ||
− | |||
− | |||
− | |||
− | |||
}} | }} | ||
'''Core i5-7200U''' is a [[dual-core]] {{arch|64}} [[x86]] microprocessor introduced by [[Intel]] in 2016. This MPU, which is based on Intel's {{intel|Kaby Lake}} microarchitecture operates at 2.5 GHz with a max boost frequency for a single core of 3.1 GHz. The MPU incorporates Intel's {{intel|HD Graphics 620}} GPU operating at 300 MHz with burst frequency of 1 GHz. | '''Core i5-7200U''' is a [[dual-core]] {{arch|64}} [[x86]] microprocessor introduced by [[Intel]] in 2016. This MPU, which is based on Intel's {{intel|Kaby Lake}} microarchitecture operates at 2.5 GHz with a max boost frequency for a single core of 3.1 GHz. The MPU incorporates Intel's {{intel|HD Graphics 620}} GPU operating at 300 MHz with burst frequency of 1 GHz. |
Revision as of 03:42, 6 January 2017
Template:mpu Core i5-7200U is a dual-core 64-bit x86 microprocessor introduced by Intel in 2016. This MPU, which is based on Intel's Kaby Lake microarchitecture operates at 2.5 GHz with a max boost frequency for a single core of 3.1 GHz. The MPU incorporates Intel's HD Graphics 620 GPU operating at 300 MHz with burst frequency of 1 GHz.
Cache
Cache Info [Edit Values] | ||
L3$ | 4 MiB 4,096 KiB 4,194,304 B 0.00391 GiB |
(shared) |
Graphics
Integrated Graphic Information | |
GPU | Intel HD Graphics 620 |
Device ID | 0x5916 |
Execution Units | 24 |
Displays | 3 |
Frequency | 300 MHz 0.3 GHz
300,000 KHz |
Max frequency | 1 GHz 1,000 MHz
1,000,000 KHz |
Max memory | 32 GB "GB" is not declared as a valid unit of measurement for this property.
|
Output | DisplayPort, Embedded DisplayPort, HDMI, DVI |
DirectX | 12 |
OpenGL | 4.4 |
OpenCL | 2.0 |
HDMI | 1.4a |
DP | 1.2 |
eDP | 1.3 |
Max HDMI Res | 4096x2304 @24 Hz |
Max DP Res | 4096x2304 @60 Hz |
Max eDP Res | 4096x2304 @60 Hz |
Intel Quick Sync Video | |
Intel InTru 3D | |
Intel Insider | |
Intel WiDi (Wireless Display) | |
Intel Clear Video |
Memory controller
Integrated Memory Controller | |
Type | DDR4-2133, DDR4-1866, LPDDR3-1866, LPDDR3-1600 |
Controllers | 1 |
Channels | 2 |
ECC Support | No |
Max bandwidth | 34,100 MB/s |
Max memory | 32,768 MB |
Expansions
Features
Facts about "Core i5-7200U - Intel"
device id | 0x5916 + |
has feature | integrated gpu + |
integrated gpu | Intel HD Graphics 620 + |
integrated gpu base frequency | 300 MHz (0.3 GHz, 300,000 KHz) + |
integrated gpu max frequency | 1,000 MHz (1 GHz, 1,000,000 KHz) + |
l3$ size | 4 MiB (4,096 KiB, 4,194,304 B, 0.00391 GiB) + |