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Difference between revisions of "intel/celeron/g3930t"
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(updated cache info)
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== Cache ==
 
== Cache ==
−
{{main|intel/microarchitectures/kaby lake#Memory_Hierarchy|l1=Kaby Lake § Cache}}
+
{{main|intel/microarchitectures/kaby_lake#Memory_Hierarchy|l1=Kaby Lake § Cache}}
−
{{cache info
+
{{cache size
 +
|l1 cache=128 KiB
 
|l1i cache=64 KiB
 
|l1i cache=64 KiB
 
|l1i break=2x32 KiB
 
|l1i break=2x32 KiB
 
|l1i desc=8-way set associative
 
|l1i desc=8-way set associative
−
|l1i extra=(per core, write-back)
+
|l1i policy=write-back
 
|l1d cache=64 KiB
 
|l1d cache=64 KiB
 
|l1d break=2x32 KiB
 
|l1d break=2x32 KiB
 
|l1d desc=8-way set associative
 
|l1d desc=8-way set associative
−
|l1d extra=(per core, write-back)
+
|l1d policy=write-back
 
|l2 cache=512 KiB
 
|l2 cache=512 KiB
 
|l2 break=2x256 KiB
 
|l2 break=2x256 KiB
 
|l2 desc=4-way set associative
 
|l2 desc=4-way set associative
−
|l2 extra=(per core, write-back)
+
|l2 policy=write-back
 
|l3 cache=2 MiB
 
|l3 cache=2 MiB
 
|l3 break=2x1 MiB
 
|l3 break=2x1 MiB
 
|l3 desc=12-way set associative
 
|l3 desc=12-way set associative
−
|l3 extra=(shared)
+
|l3 policy=write-back
 
}}
 
}}
  

Revision as of 16:21, 5 January 2017

Template:mpu Celeron G3930T is a 64-bit dual-core budget x86 desktop microprocessors introduced by Intel in early 2017. The G3930T, which is based on the Kaby Lake microarchitecture, is fabricated on Intel's improved 14nm+ process. This processor operates at 2.7 GHz and with a TDP of 35 W and supports up to 64 GiB of dual-channel non-ECC DDR4-2400. Additionally the G3930T incorporates Intel's HD Graphics 610 IGP operating at 350 MHz with a burst frequency of 1 GHz.

Cache

Main article: Kaby Lake § Cache

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$128 KiB
131,072 B
0.125 MiB
L1I$64 KiB
65,536 B
0.0625 MiB
2x32 KiB8-way set associativewrite-back
L1D$64 KiB
65,536 B
0.0625 MiB
2x32 KiB8-way set associativewrite-back
L2$512 KiB
0.5 MiB
524,288 B
4.882812e-4 GiB
  2x256 KiB4-way set associativewrite-back
L3$2 MiB
2,048 KiB
2,097,152 B
0.00195 GiB
  2x1 MiB12-way set associativewrite-back

Graphics

Integrated Graphic Information
GPU Intel HD Graphics 610
Device ID 0x5902
Displays 3
Frequency  ? MHz
"? MHz" is not a number.
Max frequency  ? MHz
"? MHz" is not a number.
Max memory  ? GiB
"? GiB" is not a number.
Output DisplayPort, Embedded DisplayPort, HDMI, DVI
DirectX 12
OpenGL 4.4
OpenCL 2.0
HDMI 1.4a
DP 1.2
eDP 1.3
Max HDMI Res 4096x2304 @24 Hz
Max DP Res 3840x2160 @60 Hz, 2880x1800 @60 Hz
Max eDP Res 3840x2160 @60 Hz, 3840x2160 @60 Hz
Intel Quick Sync Video
Intel InTru 3D
Intel Insider
Intel WiDi (Wireless Display)
Intel Clear Video

Features

Template:mpu features

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Facts about "Celeron G3930T - Intel"
RDF feed
device id0x5902 +
has featureintegrated gpu +
integrated gpuIntel HD Graphics 610 +
l1$ size128 KiB (131,072 B, 0.125 MiB) +
l1d$ description8-way set associative +
l1d$ size64 KiB (65,536 B, 0.0625 MiB) +
l1i$ description8-way set associative +
l1i$ size64 KiB (65,536 B, 0.0625 MiB) +
l2$ description4-way set associative +
l2$ size0.5 MiB (512 KiB, 524,288 B, 4.882812e-4 GiB) +
l3$ description12-way set associative +
l3$ size2 MiB (2,048 KiB, 2,097,152 B, 0.00195 GiB) +