Semiconductor & Computer Engineering
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Difference between revisions of "intel/core i3/i3-7100t"
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| − | + | '''Core i3-7100T''' is a {{arch|64}} [[dual-core]] [[x86]] desktop microprocessor introduced by [[Intel]] in early [[2017]]. This chip, which is based on the {{intel|Kaby Lake|l=arch}} microarchitecture, is fabricated on Intel's improved [[14 nm|14 nm+ process]]. This processor, which has a base frequency of 3.4 GHz with a TDP of 35 Watts, supports up to 64 GiB of dual-channel DDR4-2400. The i3-7100T incorporates Intel's {{intel|HD Graphics 630}} [[IGP]] operating at 350 MHz with burst frequency of 1.1 GHz. | |
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== Cache == | == Cache == | ||
Revision as of 17:45, 4 January 2017
Template:mpu Core i3-7100T is a 64-bit dual-core x86 desktop microprocessor introduced by Intel in early 2017. This chip, which is based on the Kaby Lake microarchitecture, is fabricated on Intel's improved 14 nm+ process. This processor, which has a base frequency of 3.4 GHz with a TDP of 35 Watts, supports up to 64 GiB of dual-channel DDR4-2400. The i3-7100T incorporates Intel's HD Graphics 630 IGP operating at 350 MHz with burst frequency of 1.1 GHz.
Cache
- Main article: Kaby Lake § Cache
| Cache Info [Edit Values] | ||
| L1I$ | 64 KiB 65,536 B 0.0625 MiB |
2x32 KiB 8-way set associative (per core, write-back) |
| L1D$ | 64 KiB 65,536 B 0.0625 MiB |
2x32 KiB 8-way set associative (per core, write-back) |
| L2$ | 512 KiB 0.5 MiB 524,288 B 4.882812e-4 GiB |
2x256 KiB 4-way set associative (per core, write-back) |
| L3$ | 3 MiB 3,072 KiB 3,145,728 B 0.00293 GiB |
shared |
Facts about "Core i3-7100T - Intel"
| l1d$ description | 8-way set associative + |
| l1d$ size | 64 KiB (65,536 B, 0.0625 MiB) + |
| l1i$ description | 8-way set associative + |
| l1i$ size | 64 KiB (65,536 B, 0.0625 MiB) + |
| l2$ description | 4-way set associative + |
| l2$ size | 0.5 MiB (512 KiB, 524,288 B, 4.882812e-4 GiB) + |
| l3$ description | shared + |
| l3$ size | 3 MiB (3,072 KiB, 3,145,728 B, 0.00293 GiB) + |