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Difference between revisions of "intel/xeon e7/e7-2830"
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(→‎Cache)
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== Cache ==
 
== Cache ==
 
{{main|intel/microarchitectures/westmere#Memory_Hierarchy|l1=Westmere § Cache}}
 
{{main|intel/microarchitectures/westmere#Memory_Hierarchy|l1=Westmere § Cache}}
−
{{cache info
+
{{cache size
 +
|l1 cache = 512 KiB
 
|l1i cache=256 KiB
 
|l1i cache=256 KiB
 
|l1i break=8x32 KiB
 
|l1i break=8x32 KiB
 
|l1i desc=4-way set associative
 
|l1i desc=4-way set associative
−
|l1i extra=(per core)
+
|l1i policy=write-back
 
|l1d cache=256 KiB
 
|l1d cache=256 KiB
 
|l1d break=8x32 KiB
 
|l1d break=8x32 KiB
 
|l1d desc=8-way set associative
 
|l1d desc=8-way set associative
−
|l1d extra=(per core)
+
|l1d policy=write-back
 
|l2 cache=2 MiB
 
|l2 cache=2 MiB
 
|l2 break=8x256 KiB
 
|l2 break=8x256 KiB
 
|l2 desc=8-way set associative
 
|l2 desc=8-way set associative
−
|l2 extra=(per core)
+
|l2 policy=write-back
 
|l3 cache=24 MiB
 
|l3 cache=24 MiB
 +
|l3 break=8x3 MiB
 
|l3 desc=16-way set associative
 
|l3 desc=16-way set associative
 +
|l3 policy=write-back
 
}}
 
}}
  

Revision as of 00:36, 2 December 2016

Template:mpu Xeon E7-2830 is a 64-bit octa-core x86 data center microprocessor that supports up to 2 sockets. This first generation Xeon E7 processor, Westmere-based, operates at a base frequency of 2.13 GHz with turob frequency of 2.4 GHz for 2 active cores. This chip has a TDP of 105 W, supporting up to 4 channels of DDR3 with support of up to 1 TB of memory.

Cache

Main article: Westmere § Cache

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$512 KiB
524,288 B
0.5 MiB
L1I$256 KiB
262,144 B
0.25 MiB
8x32 KiB4-way set associativewrite-back
L1D$256 KiB
262,144 B
0.25 MiB
8x32 KiB8-way set associativewrite-back
L2$2 MiB
2,048 KiB
2,097,152 B
0.00195 GiB
  8x256 KiB8-way set associativewrite-back
L3$24 MiB
24,576 KiB
25,165,824 B
0.0234 GiB
  8x3 MiB16-way set associativewrite-back

Graphics

This SoC has no integrated graphics processing unit.

Memory controller

Integrated Memory Controller
Type DDR3-800, DDR3-978, DDR3-1066
Controllers 1
Channels 4
ECC Support Yes
Max memory 1024 GB

Features

Template:mpu features

Retrieved from "https://en.wikichip.org/w/index.php?title=intel/xeon_e7/e7-2830&oldid=30021"
Facts about "Xeon E7-2830 - Intel"
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Xeon E7-2830 - Intel#package +
base frequency2,133.33 MHz (2.133 GHz, 2,133,330 kHz) +
bus rate6,400 MT/s (6.4 GT/s, 6,400,000 kT/s) +
bus typeQPI +
chipsetBoxboro +
clock multiplier16 +
core count8 +
core family6 +
core model47 +
core nameWestmere EX +
core steppingA2 +
core voltage1.35 V (13.5 dV, 135 cV, 1,350 mV) +
cpuid206F2 +
designerIntel +
die area513 mm² (0.795 in², 5.13 cm², 513,000,000 µm²) +
familyXeon E7 +
first announcedApril 5, 2011 +
first launchedApril 5, 2011 +
full page nameintel/xeon e7/e7-2830 +
has ecc memory supporttrue +
has extended page tables supporttrue +
has featureAdvanced Encryption Standard Instruction Set Extension +, Hyper-Threading Technology +, Turbo Boost Technology 1.0 +, Enhanced SpeedStep Technology +, Trusted Execution Technology +, Intel VT-x +, Intel VT-d + and Extended Page Tables +
has intel enhanced speedstep technologytrue +
has intel trusted execution technologytrue +
has intel turbo boost technology 1 0true +
has intel vt-d technologytrue +
has intel vt-x technologytrue +
has locked clock multipliertrue +
has second level address translation supporttrue +
has simultaneous multithreadingtrue +
has x86 advanced encryption standard instruction set extensiontrue +
instance ofmicroprocessor +
isax86-64 +
isa familyx86 +
l1$ size512 KiB (524,288 B, 0.5 MiB) +
l1d$ description8-way set associative +
l1d$ size256 KiB (262,144 B, 0.25 MiB) +
l1i$ description4-way set associative +
l1i$ size256 KiB (262,144 B, 0.25 MiB) +
l2$ description8-way set associative +
l2$ size2 MiB (2,048 KiB, 2,097,152 B, 0.00195 GiB) +
l3$ description16-way set associative +
l3$ size24 MiB (24,576 KiB, 25,165,824 B, 0.0234 GiB) +
last orderAugust 21, 2015 +
last shipmentFebruary 2, 2018 +
ldateApril 5, 2011 +
manufacturerIntel +
market segmentServer +
max case temperature337.15 K (64 °C, 147.2 °F, 606.87 °R) +
max cpu count2 +
max memory1,048,576 MiB (1,073,741,824 KiB, 1,099,511,627,776 B, 1,024 GiB, 1 TiB) +
max memory bandwidth31.77 GiB/s (32,532.48 MiB/s, 34.113 GB/s, 34,112.778 MB/s, 0.031 TiB/s, 0.0341 TB/s) +
max memory channels4 +
max storage temperature358.15 K (85 °C, 185 °F, 644.67 °R) +
microarchitectureWestmere +
min case temperature278.15 K (5 °C, 41 °F, 500.67 °R) +
min storage temperature233.15 K (-40 °C, -40 °F, 419.67 °R) +
model numberE7-2830 +
nameXeon E7-2830 +
packageFCLGA-8 +
part numberAT80615005787AB +
platformBoxboro +
process32 nm (0.032 μm, 3.2e-5 mm) +
release price$ 1,779.00 (€ 1,601.10, £ 1,440.99, ¥ 183,824.07) +
s-specSLC3J +
seriesE7-2800 +
smp max ways2 +
supported memory typeDDR3-1066 +
tdp105 W (105,000 mW, 0.141 hp, 0.105 kW) +
technologyCMOS +
thread count16 +
transistor count2,600,000,000 +
turbo frequency (1 core)2,399.99 MHz (2.4 GHz, 2,399,990 kHz) +
turbo frequency (2 cores)2,399.99 MHz (2.4 GHz, 2,399,990 kHz) +
turbo frequency (3 cores)2,266.66 MHz (2.267 GHz, 2,266,660 kHz) +
turbo frequency (4 cores)2,266.66 MHz (2.267 GHz, 2,266,660 kHz) +
turbo frequency (5 cores)2,266.66 MHz (2.267 GHz, 2,266,660 kHz) +
turbo frequency (6 cores)2,266.66 MHz (2.267 GHz, 2,266,660 kHz) +
turbo frequency (7 cores)2,266.66 MHz (2.267 GHz, 2,266,660 kHz) +
turbo frequency (8 cores)2,266.66 MHz (2.267 GHz, 2,266,660 kHz) +
word size64 bit (8 octets, 16 nibbles) +