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Difference between revisions of "intel/xeon e7/e7-2803"
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(Cache)
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== Cache ==
 
== Cache ==
 
{{main|intel/microarchitectures/westmere#Memory_Hierarchy|l1=Westmere § Cache}}
 
{{main|intel/microarchitectures/westmere#Memory_Hierarchy|l1=Westmere § Cache}}
{{cache info
+
{{cache size
 +
|l1 cache = 384 KiB
 
|l1i cache=192 KiB
 
|l1i cache=192 KiB
 
|l1i break=6x32 KiB
 
|l1i break=6x32 KiB
 
|l1i desc=4-way set associative
 
|l1i desc=4-way set associative
|l1i extra=(per core)
+
|l1i policy=write-back
 
|l1d cache=192 KiB
 
|l1d cache=192 KiB
 
|l1d break=6x32 KiB
 
|l1d break=6x32 KiB
 
|l1d desc=8-way set associative
 
|l1d desc=8-way set associative
|l1d extra=(per core)
+
|l1d policy=write-back
 
|l2 cache=1.5 MiB
 
|l2 cache=1.5 MiB
 
|l2 break=6x256 KiB
 
|l2 break=6x256 KiB
 
|l2 desc=8-way set associative
 
|l2 desc=8-way set associative
|l2 extra=(per core)
+
|l2 policy=write-back
 
|l3 cache=18 MiB
 
|l3 cache=18 MiB
 +
|l3 break=6x3 MiB
 
|l3 desc=16-way set associative
 
|l3 desc=16-way set associative
 +
|l3 policy=write-back
 
}}
 
}}
  

Revision as of 00:35, 2 December 2016

Template:mpu Xeon E7-2803 is a 64-bit hexa-core x86 data center microprocessor that supports up to 2 sockets. This first generation (Westmere-based) Xeon E7 processor operates at 1.73 GHz with a TDP of 105 W but does not support turbo boost technology. This processor supports up to 4 channels of DDR3, supporting up to 1 TB of memory.

Cache

Main article: Westmere § Cache

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$384 KiB
393,216 B
0.375 MiB
L1I$192 KiB
196,608 B
0.188 MiB
6x32 KiB4-way set associativewrite-back
L1D$192 KiB
196,608 B
0.188 MiB
6x32 KiB8-way set associativewrite-back

L2$1.5 MiB
1,536 KiB
1,572,864 B
0.00146 GiB
  6x256 KiB8-way set associativewrite-back

L3$18 MiB
18,432 KiB
18,874,368 B
0.0176 GiB
  6x3 MiB16-way set associativewrite-back

Graphics

This SoC has no integrated graphics processing unit.

Memory controller

Integrated Memory Controller
Type DDR3-800
Controllers 1
Channels 4
ECC Support Yes
Max memory 1024 GB

Features

Template:mpu features

Facts about "Xeon E7-2803 - Intel"
Has subobject
"Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.
Xeon E7-2803 - Intel#package +
base frequency1,733.33 MHz (1.733 GHz, 1,733,330 kHz) +
bus rate4,800 MT/s (4.8 GT/s, 4,800,000 kT/s) +
bus typeQPI +
chipsetBoxboro +
clock multiplier13 +
core count6 +
core family6 +
core model47 +
core nameWestmere EX +
core steppingA2 +
core voltage1.35 V (13.5 dV, 135 cV, 1,350 mV) +
cpuid206F2 +
designerIntel +
die area513 mm² (0.795 in², 5.13 cm², 513,000,000 µm²) +
familyXeon E7 +
first announcedApril 5, 2011 +
first launchedApril 5, 2011 +
full page nameintel/xeon e7/e7-2803 +
has ecc memory supporttrue +
has extended page tables supporttrue +
has featureAdvanced Encryption Standard Instruction Set Extension +, Hyper-Threading Technology +, Enhanced SpeedStep Technology +, Trusted Execution Technology +, Intel VT-x +, Intel VT-d + and Extended Page Tables +
has intel enhanced speedstep technologytrue +
has intel trusted execution technologytrue +
has intel vt-d technologytrue +
has intel vt-x technologytrue +
has locked clock multipliertrue +
has second level address translation supporttrue +
has simultaneous multithreadingtrue +
has x86 advanced encryption standard instruction set extensiontrue +
instance ofmicroprocessor +
l1$ size384 KiB (393,216 B, 0.375 MiB) +
l1d$ description8-way set associative +
l1d$ size192 KiB (196,608 B, 0.188 MiB) +
l1i$ description4-way set associative +
l1i$ size192 KiB (196,608 B, 0.188 MiB) +
l2$ description8-way set associative +
l2$ size1.5 MiB (1,536 KiB, 1,572,864 B, 0.00146 GiB) +
l3$ description16-way set associative +
l3$ size18 MiB (18,432 KiB, 18,874,368 B, 0.0176 GiB) +
last orderAugust 21, 2015 +
last shipmentFebruary 2, 2018 +
ldateApril 5, 2011 +
manufacturerIntel +
market segmentServer +
max case temperature337.15 K (64 °C, 147.2 °F, 606.87 °R) +
max cpu count2 +
max memory1,048,576 MiB (1,073,741,824 KiB, 1,099,511,627,776 B, 1,024 GiB, 1 TiB) +
max memory bandwidth23.84 GiB/s (24,412.16 MiB/s, 25.598 GB/s, 25,598.005 MB/s, 0.0233 TiB/s, 0.0256 TB/s) +
max memory channels4 +
max storage temperature358.15 K (85 °C, 185 °F, 644.67 °R) +
microarchitectureWestmere +
min case temperature278.15 K (5 °C, 41 °F, 500.67 °R) +
min storage temperature233.15 K (-40 °C, -40 °F, 419.67 °R) +
model numberE7-2803 +
nameXeon E7-2803 +
packageFCLGA-8 +
part numberAT80615006438AB +
platformBoxboro +
process32 nm (0.032 μm, 3.2e-5 mm) +
release price$ 774.00 (€ 696.60, £ 626.94, ¥ 79,977.42) +
s-specSLC3M +
seriesE7-2800 +
smp max ways2 +
supported memory typeDDR3-800 +
tdp105 W (105,000 mW, 0.141 hp, 0.105 kW) +
technologyCMOS +
thread count12 +
transistor count2,600,000,000 +
word size64 bit (8 octets, 16 nibbles) +