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Difference between revisions of "intel/core i7/i7-620lm"
< intel‎ | core i7

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{{memory controller
 
{{memory controller
 
|type=DDR3-1066
 
|type=DDR3-1066
 +
|ecc=No
 
|controllers=1
 
|controllers=1
 
|channels=2
 
|channels=2
−
|ecc=yes
 
 
|max bandwidth=15.88 GiB/s
 
|max bandwidth=15.88 GiB/s
−
|max memory=8 GiB
 
 
|bandwidth schan=7.942 GiB/s
 
|bandwidth schan=7.942 GiB/s
 
|bandwidth dchan=15.88 GiB/s
 
|bandwidth dchan=15.88 GiB/s
 
|pae=36 bit
 
|pae=36 bit
 +
|max memory=8 GiB
 
}}
 
}}

Revision as of 16:29, 27 November 2016

Template:mpu Core i7-620LM is a 64-bit dual-core x86-64 mobile microprocessor designed by Intel and introduced in early 2010. This chip is a first-generation Core i7 processor based on the Westmere microarchitecture and is manufactured on a 32 nm process. This processor operated at a based frequency of 2 GHz with a turbo frequency of 2.8 GHz and a TDP of 25 W. This MPU came with a HD Graphics (Ironlake) IGP operating at 266 MHz with a max burst frequency of 566 MHz.

Cache

Main article: Westmere § Cache

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$128 KiB
131,072 B
0.125 MiB
L1I$64 KiB
65,536 B
0.0625 MiB
2x32 KiB4-way set associativewrite-back
L1D$64 KiB
65,536 B
0.0625 MiB
2x32 KiB8-way set associativewrite-back
L2$512 KiB
0.5 MiB
524,288 B
4.882812e-4 GiB
  2x256 KiB8-way set associativewrite-back
L3$4 MiB
4,096 KiB
4,194,304 B
0.00391 GiB
  2x2 MiB16-way set associativewrite-back

Memory controller

[Edit/Modify Memory Info]

ram icons.svg
Integrated Memory Controller
Max TypeDDR3-1066
Supports ECCNo
Controllers1
Channels2
Max Bandwidth15.88 GiB/s
16,261.12 MiB/s
17.051 GB/s
17,051.02 MB/s
0.0155 TiB/s
0.0171 TB/s
Bandwidth
Single 7.942 GiB/s
Double 15.88 GiB/s
Physical Address (PAE)36 bit
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Facts about "Core i7-620LM - Intel"
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has ecc memory supportfalse +
l1$ size128 KiB (131,072 B, 0.125 MiB) +
l1d$ description8-way set associative +
l1d$ size64 KiB (65,536 B, 0.0625 MiB) +
l1i$ description4-way set associative +
l1i$ size64 KiB (65,536 B, 0.0625 MiB) +
l2$ description8-way set associative +
l2$ size0.5 MiB (512 KiB, 524,288 B, 4.882812e-4 GiB) +
l3$ description16-way set associative +
l3$ size4 MiB (4,096 KiB, 4,194,304 B, 0.00391 GiB) +
max memory bandwidth15.88 GiB/s (16,261.12 MiB/s, 17.051 GB/s, 17,051.02 MB/s, 0.0155 TiB/s, 0.0171 TB/s) +
max memory channels2 +
supported memory typeDDR3-1066 +