From WikiChip
Difference between revisions of "amd/athlon mp/amsn2800dut4c"
< amd‎ | athlon mp

Line 73: Line 73:
 
| socket 0 type      = PGA-462
 
| socket 0 type      = PGA-462
 
}}
 
}}
−
'''Athlon MP 2800+'''' (OPN ''AMSN2800DUT4C'') based on the last-generation {{amd|Barton|l=core}} core was a {{arch|32}} [[x86]] [[multiprocessor]] developed by [[AMD]] and introduced in late [[2002]] for the server and workstation market. This MPU operated at 2 GHz with a FSB transfer rate of 266 MT/s (x16 multiplier), was manufactured on a newer [[130 nm process]].
+
'''Athlon MP 2800+'''' (OPN ''AMSN2800DUT4C'') based on the last-generation {{amd|Barton|l=core}} core was a {{arch|32}} [[x86]] [[multiprocessor]] developed by [[AMD]] and introduced in early [[2003]] for the server and workstation market. This MPU operated at 2.13 GHz with a FSB transfer rate of 266 MT/s (x16 multiplier), was manufactured on a newer [[130 nm process]].

Revision as of 12:52, 17 November 2016

Template:mpu Athlon MP 2800+' (OPN AMSN2800DUT4C) based on the last-generation Barton core was a 32-bit x86 multiprocessor developed by AMD and introduced in early 2003 for the server and workstation market. This MPU operated at 2.13 GHz with a FSB transfer rate of 266 MT/s (x16 multiplier), was manufactured on a newer 130 nm process.

Retrieved from "https://en.wikichip.org/w/index.php?title=amd/athlon_mp/amsn2800dut4c&oldid=27806"