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Difference between revisions of "amd/duron/dhd1600dlv1c"
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The '''Duron 1600''' based on the Applebred core was a {{arch|32}} [[x86]] [[microprocessor]] developed by [[AMD]] and introduced in mid-2003. This model was part of the third generation of the {{amd|Duron}} family. Designed based on AMD's {{amd|microarchitecture/k7|K7}} and manufactured using their newer [[130 nm process]], this MPU operated at 1600 MHz with a bus capable of 266 MT/s with a max TDP of 57 W and a typical TDP of 48 W.
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The '''Duron 1600''' based on the {{amd|Applebred|l=core}} core was a {{arch|32}} [[x86]] [[microprocessor]] developed by [[AMD]] and introduced in mid-2003. This model was part of the third generation of the {{amd|Duron}} family. Designed based on AMD's {{amd|microarchitecture/k7|K7}} and manufactured using their newer [[130 nm process]], this MPU operated at 1600 MHz with a bus capable of 266 MT/s with a max TDP of 57 W and a typical TDP of 48 W.
  
 
== Cache ==
 
== Cache ==

Revision as of 12:21, 23 October 2016

Template:mpu The Duron 1600 based on the Applebred core was a 32-bit x86 microprocessor developed by AMD and introduced in mid-2003. This model was part of the third generation of the Duron family. Designed based on AMD's K7 and manufactured using their newer 130 nm process, this MPU operated at 1600 MHz with a bus capable of 266 MT/s with a max TDP of 57 W and a typical TDP of 48 W.

Cache

Main article: K7 § Cache
Cache Info [Edit Values]
L1I$ 64 KiB
65,536 B
0.0625 MiB
1x64 KiB 2-way set associative
L1D$ 64 KiB
65,536 B
0.0625 MiB
1x64 KiB 2-way set associative
L2$ 64 KiB
0.0625 MiB
65,536 B
6.103516e-5 GiB
1x64 KiB 16-way set associative

Graphics

This SoC has no integrated graphics processing unit.

Features

Template:mpu features

  • Halt State
  • Sleep State

See also

Retrieved from "https://en.wikichip.org/w/index.php?title=amd/duron/dhd1600dlv1c&oldid=26064"
Facts about "Duron 1600 (Applebred) - AMD"
RDF feed
base frequency1,600 MHz (1.6 GHz, 1,600,000 kHz) +
bus rate266.66 MT/s (0.267 GT/s, 266,660 kT/s) +
bus speed133.33 MHz (0.133 GHz, 133,330 kHz) +
bus typeFSB +
clock multiplier12 +
core count1 +
core family6 +
core model8 +
core nameApplebred +
core stepping0 +, 1 + and 2 +
core voltage1.5 V (15 dV, 150 cV, 1,500 mV) +
core voltage tolerance0.1 V +
cpuid680 +
designerAMD +
die area80.89 mm² (0.125 in², 0.809 cm², 80,890,000 µm²) +
familyDuron +
first announcedAugust 15, 2003 +
first launchedAugust 15, 2003 +
full page nameamd/duron/dhd1600dlv1c +
has featureHalt State + and Sleep State +
has locked clock multipliertrue +
instance ofmicroprocessor +
l1d$ description2-way set associative +
l1d$ size64 KiB (65,536 B, 0.0625 MiB) +
l1i$ description2-way set associative +
l1i$ size64 KiB (65,536 B, 0.0625 MiB) +
l2$ description16-way set associative +
l2$ size0.0625 MiB (64 KiB, 65,536 B, 6.103516e-5 GiB) +
ldateAugust 15, 2003 +
main imageFile:KL AMD Duron Applebred.jpg +
manufacturerAMD +
market segmentDesktop +
max case temperature358.15 K (85 °C, 185 °F, 644.67 °R) +
max cpu count1 +
max memory4,096 MiB (4,194,304 KiB, 4,294,967,296 B, 4 GiB, 0.00391 TiB) +
max storage temperature373.15 K (100 °C, 212 °F, 671.67 °R) +
microarchitectureK7 +
min case temperature273.15 K (0 °C, 32 °F, 491.67 °R) +
min storage temperature233.15 K (-40 °C, -40 °F, 419.67 °R) +
model numberDuron 1600 +
nameDuron 1600 +
part numberDHD1600DLV1C +
process130 nm (0.13 μm, 1.3e-4 mm) +
seriesDuron Desktop +
smp max ways1 +
tdp57 W (57,000 mW, 0.0764 hp, 0.057 kW) +
technologyCMOS +
thread count1 +
transistor count37,200,000 +
word size32 bit (4 octets, 8 nibbles) +