Semiconductor & Computer Engineering
From WikiChip
Difference between revisions of "intel/core i7ee/i7-920xm"
(→Cache) |
|||
| Line 69: | Line 69: | ||
{{main|intel/microarchitectures/nehalem#Memory_Hierarchy|l1=Nehalem's Cache}} | {{main|intel/microarchitectures/nehalem#Memory_Hierarchy|l1=Nehalem's Cache}} | ||
{{cache info | {{cache info | ||
| − | |l1i cache=128 | + | |l1i cache=128 KiB |
| − | |l1i break=4x32 | + | |l1i break=4x32 KiB |
|l1i desc=4-way set associative | |l1i desc=4-way set associative | ||
|l1i extra=(per core; writeback/allocate) | |l1i extra=(per core; writeback/allocate) | ||
| − | |l1d cache=128 | + | |l1d cache=128 KiB |
| − | |l1d break=4x32 | + | |l1d break=4x32 KiB |
|l1d desc=8-way set associative | |l1d desc=8-way set associative | ||
|l1d extra=(per core; writeback/allocate) | |l1d extra=(per core; writeback/allocate) | ||
| − | |l2 cache=1 | + | |l2 cache=1 MiB |
| − | |l2 break=4x256 | + | |l2 break=4x256 KiB |
|l2 desc=8-way set associative | |l2 desc=8-way set associative | ||
|l2 extra=(per core; writeback/allocate) | |l2 extra=(per core; writeback/allocate) | ||
Revision as of 00:00, 21 September 2016
Template:mpu The Core i7-920XM Extreme Edition is a 64-bit quad-core microprocessor introduced by Intel in late 2009 for the mobile market. The Core i7-920XM EE, which operated at 2 GHz with turbo frequency of up to 3.2 GHz for a single core was Intel's flagship mobile processor for the Nehalem microarchitecture. The chip is manufactured in 45 nm process. The i7-920XM supports 8GB of memory and has a thermal design power of 55 W.
Cache
- Main article: Nehalem's Cache
| Cache Info [Edit Values] | ||
| L1I$ | 128 KiB 131,072 B 0.125 MiB |
4x32 KiB 4-way set associative (per core; writeback/allocate) |
| L1D$ | 128 KiB 131,072 B 0.125 MiB |
4x32 KiB 8-way set associative (per core; writeback/allocate) |
| L2$ | 1 MiB 1,024 KiB 1,048,576 B 9.765625e-4 GiB |
4x256 KiB 8-way set associative (per core; writeback/allocate) |
| L3$ | 8 MiB 8,192 KiB 8,388,608 B 0.00781 GiB |
16-way set associative (writeback/allocate) |
Memory controller
| Integrated Memory Controller | |
| Type | DDR3-1066, DDR3-1333 |
| Controllers | 1 |
| Channels | 2 |
| ECC Support | No |
| Max bandwidth | 21 GB/s |
| Max memory | 8 GB |
Graphics
This MPU has no integrated graphics processing unit.
Expansions
Features
See also
Facts about "Core i7-920XM Extreme Edition - Intel"
| l1d$ description | 8-way set associative + |
| l1d$ size | 128 KiB (131,072 B, 0.125 MiB) + |
| l1i$ description | 4-way set associative + |
| l1i$ size | 128 KiB (131,072 B, 0.125 MiB) + |
| l2$ description | 8-way set associative + |
| l2$ size | 1 MiB (1,024 KiB, 1,048,576 B, 9.765625e-4 GiB) + |
| l3$ description | 16-way set associative + |
| l3$ size | 8 MiB (8,192 KiB, 8,388,608 B, 0.00781 GiB) + |