Difference between revisions of "intel/pentium (2009)/4405u"

From WikiChip

< intel‎ | pentium (2009)

Revision as of 23:00, 20 September 2016

Template:mpu The Pentium 4405U is a dual-core mid-tier 64-bit x86 mobile microprocessor introduced by Intel in September 2015. This chip operates at 2.1 GHz with a TDP of 15 Watts and a configurable TDP-down of 10 Watts. This chip incorporates the HD Graphics 510 IGP and supports up to 32 GB of dual-channel DDR3/DDR4 memory.

1 Cache
2 Graphics
3 Memory controller
4 Expansions
5 Features

Cache

Main article: Skylake § Cache

Cache Info [Edit Values]
L1I$	64 KiB 65,536 B 0.0625 MiB	2x32 KiB 8-way set associative (per core, write-back)
L1D$	64 KiB 65,536 B 0.0625 MiB	2x32 KiB 8-way set associative (per core, write-back)
L2$	512 KiB 0.5 MiB 524,288 B 4.882812e-4 GiB	2x256 KiB 4-way set associative (per core)
L3$	2 MiB 2,048 KiB 2,097,152 B 0.00195 GiB	2x1 MiB

Graphics

Integrated Graphic Information
GPU	Intel HD Graphics 510
Device ID	0x1906
Execution Units	12
Displays	3
Frequency	300 MHz 0.3 GHz 300,000 KHz
Max frequency	950 MHz 0.95 GHz 950,000 KHz
Max memory	64 GB "GB" is not declared as a valid unit of measurement for this property.
Output	DisplayPort, Embedded DisplayPort, HDMI, DVI
DirectX	12.1
OpenGL	4.4
OpenCL	2.0
HDMI	1.4
DP	1.2
eDP	1.3
Max HDMI Res	4096x2304 @24 Hz
Max DP Res	4096x2304 @60 Hz
Max eDP Res	4096x2304 @60 Hz
	Intel Quick Sync Video
	Intel WiDi (Wireless Display)
	Intel Clear Video

Memory controller

Integrated Memory Controller
Type	DDR3L-1333, DDR3L-1600, DDR3L-RS1333, DDR3L-RS1600, DDR4-1866, DDR4-2133, DDR4-RS1866, DDR4-RS2133
Controllers	1
Channels	2
ECC Support	No
Max bandwidth	34.1 GB/s
Max memory	32 GB

Expansions

Template:mpu expansions

Features

Template:mpu features

Retrieved from "https://en.wikichip.org/w/index.php?title=intel/pentium_(2009)/4405u&oldid=25640"

Facts about "Pentium 4405U - Intel"

RDF feed

Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.	Pentium 4405U - Intel#package + and Pentium 4405U - Intel#io +
base frequency	2,100 MHz (2.1 GHz, 2,100,000 kHz) +
bus rate	4,000 MT/s (4 GT/s, 4,000,000 kT/s) +
bus type	OPI +
clock multiplier	21 +
core count	2 +
core family	6 +
core model	78 +
core name	Skylake U +
core stepping	D1 +
core voltage (max)	1.52 V (15.2 dV, 152 cV, 1,520 mV) +
core voltage (min)	0.55 V (5.5 dV, 55 cV, 550 mV) +
designer	Intel +
device id	0x1906 +
die area	98.57 mm² (0.153 in², 0.986 cm², 98,570,000 µm²) +
die count	2 +
die length	10.3 mm (1.03 cm, 0.406 in, 10,300 µm) +
die width	9.57 mm (0.957 cm, 0.377 in, 9,570 µm) +
family	Pentium +
first announced	September 1, 2015 +
first launched	November 3, 2015 +
full page name	intel/pentium (2009)/4405u +
has ecc memory support	false +
has extended page tables support	true +
has feature	Advanced Encryption Standard Instruction Set Extension +, Hyper-Threading Technology +, Enhanced SpeedStep Technology +, Intel VT-x +, Intel VT-d +, Extended Page Tables +, Software Guard Extensions +, Secure Key Technology +, Flex Memory Access +, Smart Response Technology +, My WiFi Technology + and Identity Protection Technology +
has intel enhanced speedstep technology	true +
has intel flex memory access support	true +
has intel identity protection technology support	true +
has intel my wifi technology support	true +
has intel secure key technology	true +
has intel smart response technology support	true +
has intel vt-d technology	true +
has intel vt-x technology	true +
has locked clock multiplier	true +
has second level address translation support	true +
has simultaneous multithreading	true +
has x86 advanced encryption standard instruction set extension	true +
instance of	microprocessor +
integrated gpu	HD Graphics 510 +
integrated gpu base frequency	300 MHz (0.3 GHz, 300,000 KHz) +
integrated gpu designer	Intel +
integrated gpu execution units	12 +
integrated gpu max frequency	950 MHz (0.95 GHz, 950,000 KHz) +
integrated gpu max memory	32,768 MiB (33,554,432 KiB, 34,359,738,368 B, 32 GiB) +
is multi-chip package	true +
isa	x86-64 +
isa family	x86 +
l1$ size	128 KiB (131,072 B, 0.125 MiB) +
l1d$ description	8-way set associative +
l1d$ size	64 KiB (65,536 B, 0.0625 MiB) +
l1i$ description	8-way set associative +
l1i$ size	64 KiB (65,536 B, 0.0625 MiB) +
l2$ description	4-way set associative +
l2$ size	0.5 MiB (512 KiB, 524,288 B, 4.882812e-4 GiB) +
l3$ size	2 MiB (2,048 KiB, 2,097,152 B, 0.00195 GiB) +
ldate	November 3, 2015 +
main image	+
manufacturer	Intel +
market segment	Mobile +
max cpu count	1 +
max junction temperature	373.15 K (100 °C, 212 °F, 671.67 °R) +
max memory	32,768 MiB (33,554,432 KiB, 34,359,738,368 B, 32 GiB, 0.0313 TiB) +
max memory bandwidth	31.79 GiB/s (32,552.96 MiB/s, 34.134 GB/s, 34,134.253 MB/s, 0.031 TiB/s, 0.0341 TB/s) +
max memory channels	2 +
max pcie lanes	10 +
max storage temperature	398.15 K (125 °C, 257 °F, 716.67 °R) +
microarchitecture	Skylake +
min junction temperature	273.15 K (0 °C, 32 °F, 491.67 °R) +
min storage temperature	248.15 K (-25 °C, -13 °F, 446.67 °R) +
model number	4405U +
name	Pentium 4405U +
package	FCBGA-1356 +
part number	FJ8066201930905 +
process	14 nm (0.014 μm, 1.4e-5 mm) +
release price	$ 161.00 (€ 144.90, £ 130.41, ¥ 16,636.13) +
s-spec	SR2EX +
series	4000 +
smp max ways	1 +
supported memory type	DDR4-2133 +, LPDDR3-1866 + and DDR3L-1600 +
tdp	15 W (15,000 mW, 0.0201 hp, 0.015 kW) +
tdp down	10 W (10,000 mW, 0.0134 hp, 0.01 kW) +
technology	CMOS +
thread count	4 +
transistor count	1,750,000,000 +
word size	64 bit (8 octets, 16 nibbles) +
x86/has software guard extensions	true +

@@ Line 72: / Line 72: @@
 {{main|intel/microarchitectures/skylake#Memory_Hierarchy|l1=Skylake § Cache}}
 {{cache info
-|l1i cache=64 KB
+|l1i cache=64 KiB
-|l1i break=2x32 KB
+|l1i break=2x32 KiB
 |l1i desc=8-way set associative
 |l1i extra=(per core, write-back)
-|l1d cache=64 KB
+|l1d cache=64 KiB
-|l1d break=2x32 KB
+|l1d break=2x32 KiB
 |l1d desc=8-way set associative
 |l1d extra=(per core, write-back)
-|l2 cache=512 KB
+|l2 cache=512 KiB
-|l2 break=2x256 KB
+|l2 break=2x256 KiB
 |l2 desc=4-way set associative
 |l2 extra=(per core)

WikiChip

The Fuse Coverage

Social Media

Companies

Microarchitectures

Technology Nodes

Intel

AMD

ARM

Cavium

Samsung

Intel

AMD

Ampere

Apple

Cavium

HiSilicon

MediaTek

NXP

Qualcomm

Renesas