Semiconductor & Computer Engineering
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Difference between revisions of "intel/xeon e7/e7-4807"
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|l2 desc=8-way set associative | |l2 desc=8-way set associative | ||
|l2 extra=(per core) | |l2 extra=(per core) | ||
| − | |l3 cache=18 | + | |l3 cache=18 MiB |
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|l3 desc=16-way set associative | |l3 desc=16-way set associative | ||
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Revision as of 01:07, 19 September 2016
Template:mpu Xeon E7-4807 is a 64-bit hexa-core x86 data center microprocessor that supports up to 4 sockets. This first generation (Westmere-based) Xeon E7 processor operates at 1.86 GHz with 95 W TDP but does not support turbo boost technology. This processor supports up to 4 channels of DDR3, supporting up to 2 TB of memory.
Contents
Cache
- Main article: Westmere § Cache
| Cache Info [Edit Values] | ||
| L1I$ | 192 KB "KB" is not declared as a valid unit of measurement for this property. |
6x32 KB 4-way set associative (per core) |
| L1D$ | 192 KB "KB" is not declared as a valid unit of measurement for this property. |
6x32 KB 8-way set associative (per core) |
| L2$ | 1.5 MB "MB" is not declared as a valid unit of measurement for this property. |
6x256 KB 8-way set associative (per core) |
| L3$ | 18 MiB 18,432 KiB 18,874,368 B 0.0176 GiB |
16-way set associative |
Graphics
This SoC has no integrated graphics processing unit.
Memory controller
| Integrated Memory Controller | |
| Type | DDR3-800 |
| Controllers | 1 |
| Channels | 4 |
| ECC Support | Yes |
| Max memory | 2048 GB |
Features
Facts about "Xeon E7-4807 - Intel"
| l1d$ description | 8-way set associative + |
| l1i$ description | 4-way set associative + |
| l2$ description | 8-way set associative + |
| l3$ description | 16-way set associative + |
| l3$ size | 18 MiB (18,432 KiB, 18,874,368 B, 0.0176 GiB) + |