From WikiChip
Difference between revisions of "phytium/feiteng/ft-1500a-16"
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|l1i cache=512 KB | |l1i cache=512 KB | ||
|l1i break=16x32 KB | |l1i break=16x32 KB | ||
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|l1i extra=(per core) | |l1i extra=(per core) | ||
|l1d cache=512 KB | |l1d cache=512 KB | ||
|l1d break=15x32 KB | |l1d break=15x32 KB | ||
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|l1d extra=(per core) | |l1d extra=(per core) | ||
|l2 cache=8 MB | |l2 cache=8 MB | ||
|l2 break=16x512 KB | |l2 break=16x512 KB | ||
− | + | |l3 cache=8 MiB | |
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− | |l3 cache=8 | ||
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Revision as of 00:59, 19 September 2016
Template:mpu FT-1500A/16 is a hexadeca-core 64-bit ARM system on chip developed by Phytium and introduced in 2016. Manufactured on a 28 nm process, the chip operates at 1.5 GHz and dissipates a maximum of 35 W. This chip is designed for server, communication, and infrastructure applications.
Cache
Cache Info [Edit Values] | ||
L1I$ | 512 KB "KB" is not declared as a valid unit of measurement for this property. |
16x32 KB (per core) |
L1D$ | 512 KB "KB" is not declared as a valid unit of measurement for this property. |
15x32 KB (per core) |
L2$ | 8 MB "MB" is not declared as a valid unit of measurement for this property. |
16x512 KB |
L3$ | 8 MiB 8,192 KiB 8,388,608 B 0.00781 GiB |
Graphics
This SoC has no integrated graphics processing unit.
Memory controller
Integrated Memory Controller | |
Type | DDR3-1600 |
Controllers | 4 |
ECC Support | No |
Max bandwidth | 51.2 GB/s |
Expansions
Networking
- 2x Gigabit Ethernet Interfaces
Networking | |
10Base-T | Yes |
100Base-T | Yes |
1000Base-T | Yes |
Documents
Datasheet