From WikiChip
Difference between revisions of "intel/core i5/i5-7200u"
< intel‎ | core i5

Line 154: Line 154:
 
| intel fdi          =  
 
| intel fdi          =  
 
| intel clear video  = Yes
 
| intel clear video  = Yes
 +
}}
 +
 +
== Memory controller ==
 +
{{integrated memory controller
 +
| type              = DDR4-2133
 +
| type 1            = DDR4-1866
 +
| type 2            = LPDDR3-1866
 +
| type 3            = LPDDR3-1600
 +
| controllers        = 1
 +
| channels          = 2
 +
| ecc support        = No
 +
| max bandwidth      = 34,100 MB/s
 +
| max memory        = 32,768 MB
 +
}}
 +
 +
== Expansions ==
 +
{{mpu expansions
 +
| pcie revision      = 3.0
 +
| pcie lanes        = 12
 +
| pcie config        = 1x4
 +
| pcie config 1      = 2x2
 +
| pcie config 2      = 1x2+2x1
 +
| pcie config 3      = 4x1
 +
| usb revision      =
 +
| usb revision 2    =
 +
| usb ports          =
 +
| sata ports        =
 +
| integrated lan    =
 +
| uart              =
 +
| gp io              =
 +
}}
 +
 +
== Features ==
 +
{{mpu features
 +
| em64t      = Yes
 +
| nx          = Yes
 +
| txt        =
 +
| tsx        =
 +
| vpro        =
 +
| ht          = Yes
 +
| tbt1        =
 +
| tbt2        =
 +
| bpt        =
 +
| vt-x        = Yes
 +
| vt-d        = Yes
 +
| ept        = Yes
 +
| mmx        = Yes
 +
| sse        = Yes
 +
| sse2        = Yes
 +
| sse3        = Yes
 +
| ssse3      = Yes
 +
| sse4        = Yes
 +
| sse4.1      = Yes
 +
| sse4.2      = Yes
 +
| aes        = Yes
 +
| pclmul      = Yes
 +
| avx        = Yes
 +
| avx2        = Yes
 +
| bmi        = Yes
 +
| bmi1        = Yes
 +
| bmi2        = Yes
 +
| f16c        = Yes
 +
| fma3        = Yes
 +
| mpx        = Yes
 +
| sgx        = Yes
 +
| eist        = Yes
 +
| secure key  = Yes
 +
| os guard    = Yes
 +
| intel at    =
 
}}
 
}}

Revision as of 18:02, 4 September 2016

Template:mpu Core i5-7200U is a dual-core 64-bit x86 microprocessor introduced by Intel in 2016. This MPU, which is based on Intel's Kaby Lake microarchitecture operates at 2.5 GHz with a max boost frequency for a single core of 3.1 GHz. The MPU incorporates Intel's HD Graphics 620 GPU operating at 300 MHz with burst frequency of 1 GHz.

Cache

Cache Info [Edit Values]
L3$ 4 MB
"MB" is not declared as a valid unit of measurement for this property.
 		(shared)

Graphics

Integrated Graphic Information
GPU Intel HD Graphics 620
Device ID 0x5916
Displays 3
Frequency 300 MHz
0.3 GHz
300,000 KHz
Max frequency 1 GHz
1,000 MHz
1,000,000 KHz
Max memory 32 GB
"GB" is not declared as a valid unit of measurement for this property.
Output DisplayPort, Embedded DisplayPort, HDMI, DVI
DirectX 12
OpenGL 4.4
OpenCL 2.0
HDMI 1.4a
DP 1.2
eDP 1.3
Max HDMI Res 4096x2304 @24 Hz
Max DP Res 4096x2304 @60 Hz
Max eDP Res 4096x2304 @60 Hz
Intel Quick Sync Video
Intel InTru 3D
Intel Insider
Intel WiDi (Wireless Display)
Intel Clear Video

Memory controller

Integrated Memory Controller
Type DDR4-2133, DDR4-1866, LPDDR3-1866, LPDDR3-1600
Controllers 1
Channels 2
ECC Support No
Max bandwidth 34,100 MB/s
Max memory 32,768 MB

Expansions

Template:mpu expansions

Features

Template:mpu features

Retrieved from "https://en.wikichip.org/w/index.php?title=intel/core_i5/i5-7200u&oldid=23966"
Facts about "Core i5-7200U - Intel"
RDF feed
device id0x5916 +
has featureintegrated gpu +
integrated gpuIntel HD Graphics 620 +
integrated gpu base frequency300 MHz (0.3 GHz, 300,000 KHz) +
integrated gpu max frequency1,000 MHz (1 GHz, 1,000,000 KHz) +