From WikiChip
Difference between revisions of "amd/k6-2/k6-2-475afx"
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| part number 3 = | | part number 3 = | ||
| market = Desktop | | market = Desktop | ||
− | | first announced = | + | | first announced = April 15, 1999 |
− | | first launched = | + | | first launched = April 15, 1999 |
| last order = | | last order = | ||
| last shipment = | | last shipment = |
Revision as of 10:08, 21 August 2016
Template:mpu K6-2/475AFX was a 32-bit x86 K6-2-based microprocessor designed and manufactured in 1999 by AMD. Manufactured using a 0.25 µm process, this MPU operated at 475 MHz with a FSB of 95 MHz consumed 19.8 W.
Contents
Cache
- Main article: K6-2 § Cache
L2$ can be 512 KB to 2 MB, depending on manufacturer and motherboard model. L2$ is off-chip.
Cache Info [Edit Values] | ||
L1I$ | 32 KB "KB" is not declared as a valid unit of measurement for this property. |
1x32 KB 2-way set associative |
L1D$ | 32 KB "KB" is not declared as a valid unit of measurement for this property. |
1x32 KB 2-way set associative |
Graphics
This SoC has no integrated graphics processing unit.
Features
- Auto-power down state
- Stop clock state
Documents
DataSheet
- AMD-K6-2 Processor Data Sheet; Publication #21850 Revision J/0, February 2000
Facts about "K6-2/475AFX - AMD"
l1d$ description | 2-way set associative + |
l1i$ description | 2-way set associative + |