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Difference between revisions of "amd/k6-2/k6-2-500afx"
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| name = K6-2/500AFX | | name = K6-2/500AFX | ||
| no image = | | no image = | ||
− | | image = AMD-K6-2- | + | | image = Ic-photo-AMD--AMD-K6-2 500AFX-(K6-2-CPU).png |
| image size = | | image size = | ||
− | | caption = | + | | caption = Week 10, 2000 |
| designer = AMD | | designer = AMD | ||
| manufacturer = AMD | | manufacturer = AMD | ||
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* Auto-power down state | * Auto-power down state | ||
* Stop clock state | * Stop clock state | ||
+ | |||
+ | == Gallery == | ||
+ | <gallery> | ||
+ | AMD-K6-2-500EZ.jpg| | ||
+ | </gallery> | ||
== Documents == | == Documents == |
Revision as of 04:25, 5 August 2016
Template:mpu K6-2/500AFX was a 32-bit x86 K6-2-based microprocessor designed and manufactured in 1999 by AMD. Manufactured using a 0.25 µm process, this MPU operated at 500 MHz with a FSB of 100 MHz consumed 20.7 W.
Cache
- Main article: K6-2 § Cache
L2$ can be 512 KB to 2 MB, depending on manufacturer and motherboard model. L2$ is off-chip.
Cache Info [Edit Values] | ||
L1I$ | 32 KB "KB" is not declared as a valid unit of measurement for this property. |
1x32 KB 2-way set associative |
L1D$ | 32 KB "KB" is not declared as a valid unit of measurement for this property. |
1x32 KB 2-way set associative |
Graphics
This SoC has no integrated graphics processing unit.
Features
- Auto-power down state
- Stop clock state
Gallery
Documents
DataSheet
- AMD-K6-2 Processor Data Sheet; Publication #21850 Revision J/0, February 2000
Facts about "K6-2/500AFX - AMD"
l1d$ description | 2-way set associative + |
l1i$ description | 2-way set associative + |