From WikiChip
Difference between revisions of "amd/k6-2/k6-2-500afx"
< amd‎ | k6-2

Line 45: Line 45:
 
| max cpus            = 1
 
| max cpus            = 1
 
| max memory          = 4 GB
 
| max memory          = 4 GB
 +
 +
| electrical          = Yes
 +
| power              = 20.7 W
 +
| v core              = 2.2 V
 +
| v core tolerance    = 0.1 V
 +
| v io                = 3.3675 V
 +
| v io tolerance      = 7%
 +
| sdp                =
 +
| tdp                =
 +
| temp min            =
 +
| temp max            =
 +
| tjunc min          =
 +
| tjunc max          =
 +
| tcase min          = 0 °C
 +
| tcase max          = 65 °C
 +
| tstorage min        = -65 °C
 +
| tstorage max        = 150 °C
 +
 +
| packaging          = Yes
 +
| package 0          = CPGA-321
 +
| package 0 type      = CPGA
 +
| package 0 pins      = 321
 +
| package 0 pitch    = 1.27 mm
 +
| package 0 width    = 49.53 mm
 +
| package 0 length    = 49.53 mm
 +
| package 0 height    = 3.27 mm
 +
| socket 0            = Super 7
 +
| socket 0 type      = PGA-321
 +
| socket 0 2          = Socket 7
 +
| socket 0 2 type    = PGA-321
 
}}
 
}}
 
'''K6-2/500AFX''' was a {{arch|32}} [[x86]] {{amd|microarchitectures/k6-2|K6-2}}-based microprocessor designed and manufactured in [[1999]] by [[AMD]]. Manufactured using a [[0.25 µm process]], this MPU operated at 500 MHz with a [[FSB]] of 100 MHz consumed 20.7 W.
 
'''K6-2/500AFX''' was a {{arch|32}} [[x86]] {{amd|microarchitectures/k6-2|K6-2}}-based microprocessor designed and manufactured in [[1999]] by [[AMD]]. Manufactured using a [[0.25 µm process]], this MPU operated at 500 MHz with a [[FSB]] of 100 MHz consumed 20.7 W.

Revision as of 20:58, 3 August 2016

Template:mpu K6-2/500AFX was a 32-bit x86 K6-2-based microprocessor designed and manufactured in 1999 by AMD. Manufactured using a 0.25 µm process, this MPU operated at 500 MHz with a FSB of 100 MHz consumed 20.7 W.

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