From WikiChip
Difference between revisions of "intel/process-architecture-optimization"
(Created page with "{{intel title|Process-Architecture-Optimization (PAO)}} '''Process-Architecture-Optimization''' is a development model introduced by Intel for their mainstream microproces...") |
|||
Line 1: | Line 1: | ||
{{intel title|Process-Architecture-Optimization (PAO)}} | {{intel title|Process-Architecture-Optimization (PAO)}} | ||
− | '''Process-Architecture-Optimization''' is a development model introduced by [[Intel]] for their mainstream microprocessors in [[2016]] following the phase-out of their {{intel|Tick-Tock}} model. The change is a result of the increase in cost and complexity of advancing lithography processes in the past decade. Under the new model the amount of time utilized for any given process technology is lengthen. | + | '''[[name::Process-Architecture-Optimization]]''' is a [[instance of::development model]] introduced by [[Intel]] for their mainstream microprocessors in [[2016]] following the phase-out of their {{intel|Tick-Tock}} model. The change is a result of the increase in cost and complexity of advancing lithography processes in the past decade. Under the new model the amount of time utilized for any given process technology is lengthen. |
Revision as of 01:37, 3 August 2016
Process-Architecture-Optimization is a development model introduced by Intel for their mainstream microprocessors in 2016 following the phase-out of their Tick-Tock model. The change is a result of the increase in cost and complexity of advancing lithography processes in the past decade. Under the new model the amount of time utilized for any given process technology is lengthen.
Facts about "Process-Architecture-Optimization (PAO) - Intel"
instance of | development model + |
name | Process-Architecture-Optimization + |