Semiconductor & Computer Engineering
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Difference between revisions of "amd/k6/amd-k6-233anr"
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{{mpu | {{mpu | ||
| name = AMD-K6-233ANR | | name = AMD-K6-233ANR | ||
| − | | no image = | + | | no image = |
| − | | image = | + | | image = KL AMD LogoK6 K6.jpg |
| image size = | | image size = | ||
| − | | caption = | + | | caption = 233ANR, Week 46, 1997 |
| designer = AMD | | designer = AMD | ||
| manufacturer = AMD | | manufacturer = AMD | ||
Revision as of 21:30, 28 July 2016
Template:mpu AMD-K6-233ANR was a 32-bit x86 microprocessor designed by AMD and introduced in early 1997. This chip, which was based on AMD's new K6 microarchitecture, operated at 233 MHz and dissipated a maximum of 28.3 W.
Cache
- Main article: K6 § Cache
L2$ can be 256 KB to 1 MB, depending on manufacturer and motherboard model. L2$ is off-chip.
| Cache Info [Edit Values] | ||
| L1I$ | 32 KB "KB" is not declared as a valid unit of measurement for this property. |
1x32 KB 2-way set associative |
| L1D$ | 32 KB "KB" is not declared as a valid unit of measurement for this property. |
1x32 KB 2-way set associative |
Graphics
This SoC has no integrated graphics processing unit.
Features
- Auto-power down state
- Stop clock state
Facts about "AMD-K6-233ANR - AMD"
| l1d$ description | 2-way set associative + |
| l1i$ description | 2-way set associative + |