Semiconductor & Computer Engineering
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Difference between revisions of "amd/k5/amd-ssa-5-75abr"
| Line 103: | Line 103: | ||
* Auto-power down state | * Auto-power down state | ||
* Stop clock state | * Stop clock state | ||
| + | |||
| + | == Gallery == | ||
| + | <gallery> | ||
| + | File:Die amd 5k86-P75 SSA5-75BR.jpg|Chip de-capped | ||
| + | </gallery> | ||
== See also == | == See also == | ||
* {{amd|K5}} | * {{amd|K5}} | ||
Revision as of 01:48, 26 July 2016
Template:mpu AMD-SSA/5-75ABR was a 32-bit x86 microprocessor developed by AMD and released in 1996. This processor was the first of AMD's brand new K5 microarchitecture designed entirely in-house. The chip operated at 75 MHz.
Contents
Cache
- Main article: K5 § Cache
| Cache Info [Edit Values] | ||
| L1I$ | 16 KB "KB" is not declared as a valid unit of measurement for this property. |
1x16 KB 4-way set associative |
| L1D$ | 8 KB "KB" is not declared as a valid unit of measurement for this property. |
1x8 KB 4-way set associative |
Graphics
This SoC has no integrated graphics processing unit.
Features
- Auto-power down state
- Stop clock state
Gallery
Chip de-capped
See also
Facts about "AMD-SSA/5-75ABR - AMD"
| l1d$ description | 4-way set associative + |
| l1i$ description | 4-way set associative + |