Semiconductor & Computer Engineering
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Difference between revisions of "mathstar/arrix"
| Line 12: | Line 12: | ||
| first launched = November 29, 2006 | | first launched = November 29, 2006 | ||
| production start = 2006 | | production start = 2006 | ||
| − | | production end = | + | | production end = 2009 |
| arch = | | arch = | ||
| microarch = | | microarch = | ||
| Line 21: | Line 21: | ||
| proc 4 = 45 nm | | proc 4 = 45 nm | ||
| tech = CMOS | | tech = CMOS | ||
| − | | clock min = | + | | clock min = 400 MHz |
| − | | clock max = 1, | + | | clock max = 1,000 MHz |
| package = FCBGA-896 | | package = FCBGA-896 | ||
| package 2 = | | package 2 = | ||
| Line 28: | Line 28: | ||
| socket = FCBGA-896 | | socket = FCBGA-896 | ||
| socket 2 = | | socket 2 = | ||
| − | | socket | + | | socket 3 = |
| succession = Yes | | succession = Yes | ||
| Line 36: | Line 36: | ||
| successor link = | | successor link = | ||
}} | }} | ||
| − | '''Arrix''' was a family of [[field-programmable object array]] designed by [[MathStar]] and introduced in late [[2006]]. | + | '''Arrix''' was a family of [[field-programmable object array]] designed by [[MathStar]] and introduced in late [[2006]]. MathStar continued manufacturing this until 2009. |
== Architecture == | == Architecture == | ||
| Line 68: | Line 68: | ||
| {{\|MOA2400D-04R}} || 400 MHz || 400 || FCBGA-896 RoHS || Commercial | | {{\|MOA2400D-04R}} || 400 MHz || 400 || FCBGA-896 RoHS || Commercial | ||
|} | |} | ||
| + | |||
| + | == Documents == | ||
| + | |||
| + | === Product Brief === | ||
| + | * [[:File:Arrix Family Product Brief (April 2007).pdf|Arrix Family Product Brief]], April 2007 | ||
| + | * [[:File:Arrix Family Product Brief (August 2006).pdf|Arrix Family Product Brief]], August 2006 | ||
| + | * [[:File:MOA1400D Product Brief (February 2006).pdf|MOA1400D Product Brief]], February 2006 | ||
| + | |||
| + | === IP Cores === | ||
| + | * [[:File:Color Space Conversion (RGB to YCRCB) for Arrix FPOA.pdf|Color Space Conversion (RGB to YCRCB) for Arrix FPOA]] | ||
| + | * [[:File:Flat Field Correction for Arrix FPOA.pdf|Flat Field Correction for Arrix FPOA]] | ||
| + | * [[:File:JPEG 2000 Encoder for Arrix FPOA.pdf|JPEG 2000 Encoder for Arrix FPOA]] | ||
| + | * [[:File:MPEG2 Multi-channel Decoder for FPOA.pdf|MPEG2 Multi-channel Decoder for FPOA]] | ||
| + | |||
| + | === Software === | ||
| + | * [[:File:Silicon Objects Software Development Environment.pdf|Silicon Objects Software Development Environment]] | ||
Revision as of 22:29, 27 June 2016
| Arrix | |
| |
| Developer | MathStar |
| Manufacturer | TSMC |
| Type | Programmable logic device |
| Introduction | September 25, 2006 (announced) November 29, 2006 (launch) |
| Production | 2006-2009 |
| Word size | 16 bit 2 octets
4 nibbles |
| Process | 130 nm 0.13 μm , 90 nm1.3e-4 mm 0.09 μm , 65 nm9.0e-5 mm 0.065 μm , 45 nm6.5e-5 mm 0.045 μm
4.5e-5 mm |
| Technology | CMOS |
| Clock | 400 MHz-1,000 MHz |
| Package | FCBGA-896 |
| Socket | FCBGA-896 |
| Succession | |
| ← | |
| Builder | |
Arrix was a family of field-programmable object array designed by MathStar and introduced in late 2006. MathStar continued manufacturing this until 2009.
Contents
Architecture
 |
This section is empty; you can help add the missing info by editing this page. |
Members
MOA2400D Series
| Model | Frequency | OBjects | Package | Temp Range |
|---|---|---|---|---|
| MOA2400D-10 | 1,000 MHz | 400 | FCBGA-896 | Commercial |
| MOA2400D-10R | 1,000 MHz | 400 | FCBGA-896 RoHS | Commercial |
| MOA2400D-09 | 900 MHz | 400 | FCBGA-896 | Industrial |
| MOA2400D-09R | 900 MHz | 400 | FCBGA-896 RoHS | Industrial |
| MOA2400D-08 | 800 MHz | 400 | FCBGA-896 | Industrial |
| MOA2400D-08R | 800 MHz | 400 | FCBGA-896 RoHS | Industrial |
| MOA2400D-06 | 600 MHz | 400 | FCBGA-896 | Industrial |
| MOA2400D-06R | 600 MHz | 400 | FCBGA-896 RoHS | Industrial |
| MOA2400D-04 | 400 MHz | 400 | FCBGA-896 | Commercial |
| MOA2400D-04R | 400 MHz | 400 | FCBGA-896 RoHS | Commercial |
Documents
Product Brief
- Arrix Family Product Brief, April 2007
- Arrix Family Product Brief, August 2006
- MOA1400D Product Brief, February 2006
IP Cores
- Color Space Conversion (RGB to YCRCB) for Arrix FPOA
- Flat Field Correction for Arrix FPOA
- JPEG 2000 Encoder for Arrix FPOA
- MPEG2 Multi-channel Decoder for FPOA
Software
Facts about "Arrix - MathStar"
| designer | MathStar + |
| first announced | September 25, 2006 + |
| first launched | November 29, 2006 + |
| full page name | mathstar/arrix + |
| instance of | integrated circuit family + |
| main designer | MathStar + |
| manufacturer | TSMC + |
| name | Arrix + |
| package | FCBGA-896 + |
| process | 130 nm (0.13 μm, 1.3e-4 mm) +, 90 nm (0.09 μm, 9.0e-5 mm) +, 65 nm (0.065 μm, 6.5e-5 mm) + and 45 nm (0.045 μm, 4.5e-5 mm) + |
| socket | FCBGA-896 + |
| technology | CMOS + |
| word size | 16 bit (2 octets, 4 nibbles) + |