From WikiChip
Difference between revisions of "mathstar/arrix"
< mathstar

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| clock min        = 1,000 MHz
 
| clock min        = 1,000 MHz
 
| clock max        = 1,500 MHz
 
| clock max        = 1,500 MHz
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| package          =  
+
| package          = FCBGA-896
 
| package 2        =  
 
| package 2        =  
 
| package 3        =  
 
| package 3        =  
−
| socket            =  
+
| socket            = FCBGA-896
 
| socket 2          =  
 
| socket 2          =  
 
| socket 2          =  
 
| socket 2          =  
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| successor link  =  
 
| successor link  =  
 
}}
 
}}
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'''Arrix''' was a family of [[field-programmable object array]] designed by [[MathStar]] and introduced in late [[2006]].
 +
 +
== Architecture ==
 +
{{empty section}}
 +
 +
== Members ==
 +
 +
=== MOA2400D Series ===
 +
{| class="wikitable sortable"
 +
|-
 +
! Model !! Frequency !! OBjects !! Package !! Temp Range
 +
|-
 +
| {{\|MOA2400D-10}} || 1,000 MHz || 400 || FCBGA-896 || Commercial
 +
|-
 +
| {{\|MOA2400D-10R}} || 1,000 MHz || 400 || FCBGA-896 RoHS || Commercial
 +
|-
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| {{\|MOA2400D-09}} || 900 MHz || 400 || FCBGA-896 || Industrial
 +
|-
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| {{\|MOA2400D-09R}} || 900 MHz || 400 || FCBGA-896 RoHS || Industrial
 +
|-
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| {{\|MOA2400D-08}} || 800 MHz || 400 || FCBGA-896 || Industrial
 +
|-
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| {{\|MOA2400D-08R}} || 800 MHz || 400 || FCBGA-896 RoHS || Industrial
 +
|-
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| {{\|MOA2400D-06}} || 600 MHz || 400 || FCBGA-896 || Industrial
 +
|-
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| {{\|MOA2400D-06R}} || 600 MHz || 400 || FCBGA-896 RoHS || Industrial
 +
|-
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| {{\|MOA2400D-04}} || 400 MHz || 400 || FCBGA-896 || Commercial
 +
|-
 +
| {{\|MOA2400D-04R}} || 400 MHz || 400 || FCBGA-896 RoHS || Commercial
 +
|}

Revision as of 21:35, 27 June 2016

Arrix
arrix chip.gif
Developer MathStar
Manufacturer TSMC
Type Programmable logic device
Introduction September 25, 2006 (announced)
November 29, 2006 (launch)
Production 2006-2008
Word size 16 bit
2 octets
4 nibbles
Process 130 nm
0.13 μm
1.3e-4 mm
, 90 nm
0.09 μm
9.0e-5 mm
, 65 nm
0.065 μm
6.5e-5 mm
, 45 nm
0.045 μm
4.5e-5 mm
Technology CMOS
Clock 1,000 MHz-1,500 MHz
Package FCBGA-896
Socket FCBGA-896
Succession
←
Builder

Arrix was a family of field-programmable object array designed by MathStar and introduced in late 2006.

Architecture

New text document.svg This section is empty; you can help add the missing info by editing this page.

Members

MOA2400D Series

Model Frequency OBjects Package Temp Range
MOA2400D-10 1,000 MHz 400 FCBGA-896 Commercial
MOA2400D-10R 1,000 MHz 400 FCBGA-896 RoHS Commercial
MOA2400D-09 900 MHz 400 FCBGA-896 Industrial
MOA2400D-09R 900 MHz 400 FCBGA-896 RoHS Industrial
MOA2400D-08 800 MHz 400 FCBGA-896 Industrial
MOA2400D-08R 800 MHz 400 FCBGA-896 RoHS Industrial
MOA2400D-06 600 MHz 400 FCBGA-896 Industrial
MOA2400D-06R 600 MHz 400 FCBGA-896 RoHS Industrial
MOA2400D-04 400 MHz 400 FCBGA-896 Commercial
MOA2400D-04R 400 MHz 400 FCBGA-896 RoHS Commercial
Retrieved from "https://en.wikichip.org/w/index.php?title=mathstar/arrix&oldid=22497"
Facts about "Arrix - MathStar"
RDF feed
designerMathStar +
first announcedSeptember 25, 2006 +
first launchedNovember 29, 2006 +
full page namemathstar/arrix +
instance ofintegrated circuit family +
main designerMathStar +
manufacturerTSMC +
nameArrix +
packageFCBGA-896 +
process130 nm (0.13 μm, 1.3e-4 mm) +, 90 nm (0.09 μm, 9.0e-5 mm) +, 65 nm (0.065 μm, 6.5e-5 mm) + and 45 nm (0.045 μm, 4.5e-5 mm) +
socketFCBGA-896 +
technologyCMOS +
word size16 bit (2 octets, 4 nibbles) +