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Difference between revisions of "ambric/am2000/am2045b"
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'''Am2045B''' was [[Ambric]]'s flagship [[MPPA]] introduced in late 2007. This model was made of {{ambric|am2000#Architecture|43 Brics}} arranged as a grid, making up a total of 344 {{arch|32}} [[RICS]]-like cores operating asynchronously at 1-350 MHz. This was an enhanced version of the {{\\|Am2045|original}} which featured a higher bandwidth [[network on a chip]] (Ambric claimed up to 40 percent improvement), operated at higher frequency, and provided up to 1.2 trillion operations per seconds theoretical peak computation. This model also had lower power consumption over the original.
 
'''Am2045B''' was [[Ambric]]'s flagship [[MPPA]] introduced in late 2007. This model was made of {{ambric|am2000#Architecture|43 Brics}} arranged as a grid, making up a total of 344 {{arch|32}} [[RICS]]-like cores operating asynchronously at 1-350 MHz. This was an enhanced version of the {{\\|Am2045|original}} which featured a higher bandwidth [[network on a chip]] (Ambric claimed up to 40 percent improvement), operated at higher frequency, and provided up to 1.2 trillion operations per seconds theoretical peak computation. This model also had lower power consumption over the original.
  
 +
Note that some early models might have had only 42 brics at one point for 336 cores.
 
== Architecture ==
 
== Architecture ==
 
{{main|ambric/am2000#Architecture|l1=Am2000 § Architecture}}
 
{{main|ambric/am2000#Architecture|l1=Am2000 § Architecture}}

Revision as of 09:42, 26 June 2016

Template:mpu Am2045B was Ambric's flagship MPPA introduced in late 2007. This model was made of 43 Brics arranged as a grid, making up a total of 344 32-bit RICS-like cores operating asynchronously at 1-350 MHz. This was an enhanced version of the original which featured a higher bandwidth network on a chip (Ambric claimed up to 40 percent improvement), operated at higher frequency, and provided up to 1.2 trillion operations per seconds theoretical peak computation. This model also had lower power consumption over the original.

Note that some early models might have had only 42 brics at one point for 336 cores.

Architecture

Main article: Am2000 § Architecture

The Am2045B is made of 43 homogeneous 'Brics' laid out in a grid to form 344 cores.

General layout:

  • 43x Brics

Memory controller

Integrated Memory Controller
Type DDR2-400
Controllers 2
Channels 1
Max memory 4 GB

Expansions

  • PCIe
  • JTAG
  • 128x GPIO @ 100 MHz
  • serial flash

Die Shot

Am2045 die shot.png Am2045 die shot (annotated).png
Facts about "Am2045B - Ambric"
has featurePCIe +, JTAG +, GPIO + and serial flash +