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Difference between revisions of "amd/am486/am486dx2-100v16b"
| Line 24: | Line 24: | ||
| bus type = FSB | | bus type = FSB | ||
| bus speed = 50 MHz | | bus speed = 50 MHz | ||
| − | | bus rate = | + | | bus rate = 50 MT/s |
| clock multiplier = 2 | | clock multiplier = 2 | ||
| cpuid = | | cpuid = | ||
Revision as of 04:37, 17 May 2016
Template:mpu Am486DX2-100V16B was an 80486-compatible microprocessor introduced by AMD in 1995. This processor had a clock multiplier of 2 having base frequency of 100 MHz with a bus frequency of 50 MHz. This model had a write-back cache and double the size of L1 of previous models (16 KB). The Am486DX2-100V8T and Am486DX2-100V8B are an 8 KB version of this model.
Cache
- Main article: 80486 § Cache
| Cache Info [Edit Values] | ||
| L1$ | 16 KB "KB" is not declared as a valid unit of measurement for this property. |
1x16 KB 4-way set associative (unified, write-back policy) |
Graphics
This chip had no integrated graphics processing unit.