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Difference between revisions of "amd/am486/am486dx2-66nv8t"
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'''Am486DX2-66NV8T''' was an {{intel|80486}}-compatible microprocessor introduced by [[AMD]] in 1995 following the conclusion of the legal battle with Intel. This processor had a clock multiplier of 2 having base frequency of 66 MHz with a bus frequency of 33 MHz. This model is is a modified version of {{\\|Am486DX2-66V8T}} (and earlier {{\\|Am486DX2-66}}) that no longer included Intel's ICE microcode.
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'''Am486DX2-66NV8T''' was an {{intel|80486}}-compatible microprocessor introduced by [[AMD]] in 1995 following the conclusion of the legal battle with Intel. This processor had a clock multiplier of 2 having base frequency of 66 MHz with a bus frequency of 33 MHz. This model is is a modified version of {{\\|Am486DX2-66V8T}} (and earlier {{\\|Am486DX2-66}}) that {{amd|Am486#Larger Cache & Post-lawsuit|no longer included Intel's ICE microcode}}.
  
 
== Cache ==
 
== Cache ==

Revision as of 03:35, 17 May 2016

Template:mpu Am486DX2-66NV8T was an 80486-compatible microprocessor introduced by AMD in 1995 following the conclusion of the legal battle with Intel. This processor had a clock multiplier of 2 having base frequency of 66 MHz with a bus frequency of 33 MHz. This model is is a modified version of Am486DX2-66V8T (and earlier Am486DX2-66) that no longer included Intel's ICE microcode.

Cache

Main article: 80486 § Cache
Cache Info [Edit Values]
L1$ 8 KB
"KB" is not declared as a valid unit of measurement for this property.
1x8 KB 4-way set associative (unified, write-through policy)

Graphics

This chip had no integrated graphics processing unit.

Documents

See also

Facts about "Am486DX2-66NV8T - AMD"
l1$ description4-way set associative +