Semiconductor & Computer Engineering
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Difference between revisions of "amd/am486/am486dx2-100v8b"
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Revision as of 04:26, 17 May 2016
Template:mpu Am486DX2-100V8B was an 80486-compatible microprocessor introduced by AMD in 1994. This processor had a clock multiplier of 2 having base frequency of 100 MHz with a bus frequency of 50 MHz. This model is a write-back cache version of the Am486DX2-100V8T (and older 100). The Am486DX2-100V16B is an identical model with double the L1 cache of this one.
Cache
- Main article: 80486 § Cache
| Cache Info [Edit Values] | ||
| L1$ | 8 KB "KB" is not declared as a valid unit of measurement for this property. |
1x8 KB 4-way set associative (unified, write-back policy) |
Graphics
This chip had no integrated graphics processing unit.
See also
Facts about "Am486DX2-100V8B - AMD"
| base frequency | 100 MHz (0.1 GHz, 100,000 kHz) + |
| bus rate | 50 MT/s (0.05 GT/s, 50,000 kT/s) + |
| bus speed | 50 MHz (0.05 GHz, 50,000 kHz) + |
| bus type | FSB + |
| clock multiplier | 2 + |
| core count | 1 + |
| core name | 486DX2V + |
| core voltage | 3.3 V (33 dV, 330 cV, 3,300 mV) + |
| core voltage tolerance | 0.3 V + |
| designer | AMD + |
| family | Am486 + |
| first launched | 1994 + |
| full page name | amd/am486/am486dx2-100v8b + |
| instance of | microprocessor + |
| l1$ description | 4-way set associative + |
| l1$ size | 8 KiB (8,192 B, 0.00781 MiB) + |
| ldate | 1994 + |
| manufacturer | AMD + |
| market segment | Desktop + |
| max cpu count | 1 + |
| max memory | 4,096 MiB (4,194,304 KiB, 4,294,967,296 B, 4 GiB, 0.00391 TiB) + |
| max operating temperature | 85 °C + |
| microarchitecture | 80486 + |
| min operating temperature | 0 °C + |
| model number | Am486DX2-100V8B + |
| name | Am486DX2-100V8B + |
| part number | A80486DX2-100V8B + |
| process | 500 nm (0.5 μm, 5.0e-4 mm) + |
| series | Am486DX2V + |
| smp max ways | 1 + |
| technology | CMOS + |
| word size | 32 bit (4 octets, 8 nibbles) + |