Semiconductor & Computer Engineering
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Difference between revisions of "amd/am486/am486dx4-100v16b"
| Line 63: | Line 63: | ||
| packaging = Yes | | packaging = Yes | ||
| − | | package | + | | package 0 = CPGA-168 |
| − | | package type | + | | package 0 type = CPGA |
| − | | package pitch | + | | package 0 pins = 168 |
| − | | package | + | | package 0 pitch = 2.286 mm |
| − | | socket | + | | package 0 width = 44.069 mm |
| − | | socket 2 | + | | package 0 length = 44.069 mm |
| − | | socket 3 | + | | package 0 height = 3.556 mm |
| + | | socket 0 = Socket 1 | ||
| + | | socket 0 type = | ||
| + | | socket 0 2 = Socket 2 | ||
| + | | socket 0 2 type = | ||
| + | | socket 0 3 = Socket 3 | ||
| + | | socket 0 3 type = | ||
}} | }} | ||
'''Am486DX2-66V16B''' was an Enhanced {{amd|Am486}} microprocessor introduced by [[AMD]] in 1997. This processor had a clock multiplier of 3 having base frequency of 100 MHz with a bus frequency of 33 MHz. This model had larger L1 cache of 16 KB with Write-Back policy. This model has twice as much cache as the {{\\|Am486DX4-100V8T}} model (previously {{\\|Am486DX4-100}}). This "Enhanced" Am486 includes some other features such as SMM. | '''Am486DX2-66V16B''' was an Enhanced {{amd|Am486}} microprocessor introduced by [[AMD]] in 1997. This processor had a clock multiplier of 3 having base frequency of 100 MHz with a bus frequency of 33 MHz. This model had larger L1 cache of 16 KB with Write-Back policy. This model has twice as much cache as the {{\\|Am486DX4-100V8T}} model (previously {{\\|Am486DX4-100}}). This "Enhanced" Am486 includes some other features such as SMM. | ||
Revision as of 21:39, 16 May 2016
Template:mpu Am486DX2-66V16B was an Enhanced Am486 microprocessor introduced by AMD in 1997. This processor had a clock multiplier of 3 having base frequency of 100 MHz with a bus frequency of 33 MHz. This model had larger L1 cache of 16 KB with Write-Back policy. This model has twice as much cache as the Am486DX4-100V8T model (previously Am486DX4-100). This "Enhanced" Am486 includes some other features such as SMM.
Contents
Cache
- Main article: 80486 § Cache
| Cache Info [Edit Values] | ||
| L1$ | 16 KB "KB" is not declared as a valid unit of measurement for this property. |
1x16 KB 4-way set associative (unified, write-back policy) |
Graphics
This chip had no integrated graphics processing unit.
Features
- System Management Mode (SMM)
See also
Facts about "Am486DX4-100V16B - AMD"
| has feature | System Management Mode + |
| l1$ description | 4-way set associative + |