From WikiChip
Difference between revisions of "amd/am486/am486dx-40"
< amd‎ | am486

(test)
Line 63: Line 63:
  
 
| packaging          = Yes
 
| packaging          = Yes
| package 0          = PGA-168
+
| package 0          = CPGA-168
| package 0 type      = PGA
+
| package 0 type      = CPGA
 
| package 0 pins      = 168
 
| package 0 pins      = 168
| package 0 pitch    = 1 mm
+
| package 0 pitch    = 2.286 mm
| package 0 width    = 1 mm
+
| package 0 width    = 44.069 mm
| package 0 length    = 1 mm
+
| package 0 length    = 44.069 mm
| package 0 height    = 1 mm
+
| package 0 height    = 3.556 mm
 
| socket 0            = Socket 1
 
| socket 0            = Socket 1
 +
| socket 0 type      =
 
| socket 0 2          = Socket 2
 
| socket 0 2          = Socket 2
 +
| socket 0 2 type    =
 
| socket 0 3          = Socket 3
 
| socket 0 3          = Socket 3
 +
| socket 0 3 type    =
 
}}
 
}}
 
'''Am486DX-40''' was an {{intel|80486}}-compatible microprocessor introduced by [[AMD]] in 1993. This processor operated at 40 MHz.
 
'''Am486DX-40''' was an {{intel|80486}}-compatible microprocessor introduced by [[AMD]] in 1993. This processor operated at 40 MHz.

Revision as of 21:32, 16 May 2016

Template:mpu Am486DX-40 was an 80486-compatible microprocessor introduced by AMD in 1993. This processor operated at 40 MHz.

Cache

Main article: 80486 § Cache
Cache Info [Edit Values]
L1$ 8 KB
"KB" is not declared as a valid unit of measurement for this property.
1x8 KB 4-way set associative (unified, write-through policy)

Graphics

This chip had no integrated graphics processing unit.

Gallery

Documents

See also

Facts about "Am486DX-40 - AMD"
l1$ description4-way set associative +