Semiconductor & Computer Engineering
From WikiChip
Difference between revisions of "amd/am486/am486dx2-66v8b"
(Created page with "{{amd title|Am486DX2-66V8B}} {{mpu | name = Am486DX2-66V8B | no image = Yes | image = | image size = | caption =...") |
|||
| Line 71: | Line 71: | ||
| socket 3 = Socket 3 | | socket 3 = Socket 3 | ||
}} | }} | ||
| − | '''Am486DX2-66V8B''' was an {{intel|80486}}-compatible microprocessor introduced by [[AMD]] in 1994. This processor had a clock multiplier of 2 having base frequency of 66 MHz with a bus frequency of 33 MHz. This model is a variation of {{\\|Am486DX2- | + | '''Am486DX2-66V8B''' was an {{intel|80486}}-compatible microprocessor introduced by [[AMD]] in 1994. This processor had a clock multiplier of 2 having base frequency of 66 MHz with a bus frequency of 33 MHz. This model is a variation of {{\\|Am486DX2-66V8T}} (previously {{\\|Am486DX2-66}}) with 8 KB Write-Back cache instead of Write-Through. The {{\\|Am486DX2-66V16T}} and {{\\|Am486DX2-66V16B}} are also similar models with double the cache size. |
== Cache == | == Cache == | ||
Revision as of 20:46, 15 May 2016
Template:mpu Am486DX2-66V8B was an 80486-compatible microprocessor introduced by AMD in 1994. This processor had a clock multiplier of 2 having base frequency of 66 MHz with a bus frequency of 33 MHz. This model is a variation of Am486DX2-66V8T (previously Am486DX2-66) with 8 KB Write-Back cache instead of Write-Through. The Am486DX2-66V16T and Am486DX2-66V16B are also similar models with double the cache size.
Cache
- Main article: 80486 § Cache
| Cache Info [Edit Values] | ||
| L1$ | 8 KB "KB" is not declared as a valid unit of measurement for this property. |
1x8 KB 4-way set associative (unified, write-back policy) |
Graphics
This chip had no integrated graphics processing unit.