Semiconductor & Computer Engineering
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Difference between revisions of "amd/am486/am486dx2-100v8b"
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| − | '''Am486DX2-100V8B''' was an {{intel|80486}}-compatible microprocessor introduced by [[AMD]] in 1994. This processor had a clock multiplier of 2 having base frequency of 100 MHz with a bus frequency of | + | '''Am486DX2-100V8B''' was an {{intel|80486}}-compatible microprocessor introduced by [[AMD]] in 1994. This processor had a clock multiplier of 2 having base frequency of 100 MHz with a bus frequency of 50 MHz. This model is a write-back cache version of the {{\\|Am486DX2-100V8T}} (and older {{\\|Am486DX2-100|100}}). The {{\\|Am486DX2-100V16B}} is an identical model with double the L1 cache of this one. |
== Cache == | == Cache == | ||
Revision as of 17:28, 15 May 2016
Template:mpu Am486DX2-100V8B was an 80486-compatible microprocessor introduced by AMD in 1994. This processor had a clock multiplier of 2 having base frequency of 100 MHz with a bus frequency of 50 MHz. This model is a write-back cache version of the Am486DX2-100V8T (and older 100). The Am486DX2-100V16B is an identical model with double the L1 cache of this one.
Cache
- Main article: 80486 § Cache
| Cache Info [Edit Values] | ||
| L1$ | 8 KB "KB" is not declared as a valid unit of measurement for this property. |
1x8 KB 4-way set associative (unified, write-back policy) |
Graphics
This chip had no integrated graphics processing unit.