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Difference between revisions of "amd/am486/am486dx2-80v8t"
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'''Am486DX2-80V8T''' was an {{intel|80486}}-compatible microprocessor introduced by [[AMD]] in 1994. This processor had a clock multiplier of 2 having base frequency of 80 MHz with a bus frequency of 40 MHz. This model is essentially identical to {{\\|Am486DX2-80}} apart from the process used. The new model name was used when AMD started introducing various models with Write-Back cache policy (those ended with "B" instead of "T" like this one).
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'''Am486DX2-80V8T''' was an {{intel|80486}}-compatible microprocessor introduced by [[AMD]] in 1994. This processor had a clock multiplier of 2 having base frequency of 80 MHz with a bus frequency of 40 MHz. This model is essentially identical to {{\\|Am486DX2-80}}. The new model name was used when AMD started introducing new models with Write-Back cache policy (those ended with "B" instead of "T" like this one).
  
 
== Cache ==
 
== Cache ==

Revision as of 17:10, 15 May 2016

Template:mpu Am486DX2-80V8T was an 80486-compatible microprocessor introduced by AMD in 1994. This processor had a clock multiplier of 2 having base frequency of 80 MHz with a bus frequency of 40 MHz. This model is essentially identical to Am486DX2-80. The new model name was used when AMD started introducing new models with Write-Back cache policy (those ended with "B" instead of "T" like this one).

Cache

Main article: 80486 § Cache
Cache Info [Edit Values]
L1$ 8 KB
"KB" is not declared as a valid unit of measurement for this property.
1x8 KB 4-way set associative (unified, write-through policy)

Graphics

This chip had no integrated graphics processing unit.

See also

Facts about "Am486DX2-80V8T - AMD"
l1$ description4-way set associative +