From WikiChip
Difference between revisions of "intel/80486/486dx4-100"
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{{mpu | {{mpu | ||
| name = Intel i486DX4-100 | | name = Intel i486DX4-100 | ||
− | + | | image = I486DX4.jpg | |
− | | image = | ||
| image size = | | image size = | ||
− | | caption = | + | | caption = A80486DX4-100, S-Spec SX900 |
| designer = Intel | | designer = Intel | ||
| manufacturer = Intel | | manufacturer = Intel |
Revision as of 15:59, 11 May 2016
Template:mpu i486DX4-100 was a fourth-generation x86 microprocessor introduced by Intel in 1994. This chip, which is based on the 80486 microarchitecture, had a clock multiplier of x2, x2.5, and x3 with a max operating frequency of 100 MHz, three times the bus frequency. Like the original i486DX, this chip implemented the 80387 FPU on-die and incorporated System Management Mode (SMM). The DX4 series had twice as much cache space as the older processors.
Contents
Cache
- Main article: 80486 § Cache
Cache Info [Edit Values] | ||
L1$ | 16 KB "KB" is not declared as a valid unit of measurement for this property. |
1x16 KB 4-way set associative (unified, write-through policy) |
Graphics
This chip had no integrated graphics processing unit.
Features
- System Management Mode (SMM)