Semiconductor & Computer Engineering
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Difference between revisions of "intel/80486/486sl-25"
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| + | '''i486SL-25''' was a fourth-generation [[x86]] [[microprocessor]] introduced by [[Intel]] in 1992. This chip, which is based on the {{intel|microarchitectures/80486|80486 microarchitecture}}, operated at 25 MHz. Like the original i486DX, this chip implemented the {{intel|80387}} [[FPU]] on-die and incorporated {{intel|System Management Mode}} (SMM). This series was designed to be a low power version of the i486DX, offering lower voltage and power saving features for portable mobile computers. | ||
| + | |||
| + | == Cache == | ||
| + | {{main|intel/microarchitectures/80486#Memory_Hierarchy|l1=80486 § Cache}} | ||
| + | {{cache info | ||
| + | |l1 cache=8 KB | ||
| + | |l1 break=1x8 KB | ||
| + | |l1 desc=4-way set associative | ||
| + | |l1 extra=(unified, write-through policy) | ||
| + | }} | ||
| + | |||
| + | == Graphics == | ||
| + | This chip had no integrated graphics processing unit. | ||
| + | |||
| + | == Features == | ||
| + | * {{intel|System Management Mode}} (SMM) | ||
| + | |||
| + | == See also == | ||
| + | * {{intel|80486|80486 family}} | ||
Revision as of 14:18, 11 May 2016
Template:mpu i486SL-25 was a fourth-generation x86 microprocessor introduced by Intel in 1992. This chip, which is based on the 80486 microarchitecture, operated at 25 MHz. Like the original i486DX, this chip implemented the 80387 FPU on-die and incorporated System Management Mode (SMM). This series was designed to be a low power version of the i486DX, offering lower voltage and power saving features for portable mobile computers.
Contents
Cache
- Main article: 80486 § Cache
| Cache Info [Edit Values] | ||
| L1$ | 8 KB "KB" is not declared as a valid unit of measurement for this property. |
1x8 KB 4-way set associative (unified, write-through policy) |
Graphics
This chip had no integrated graphics processing unit.
Features
- System Management Mode (SMM)