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Revision as of 02:13, 28 April 2016
Turbo Boost Technology (TBT) is a microprocessor technology developed by Intel that attempts to enable temporary higher performance by opportunistically and automatically increasing the processor's clock frequency. This feature automatically kicks in on TBT-enabled processors when when there is sufficient headroom - subject to power rating, temperature rating, and current limits.
Contents
History
Turbo Boost Technology 1.0 was first introduced announced in a white paper they published in November 2008. It was consequently introduced in the Nehalem microarchitecture. Turbo Boost 2.0 was introduced later in 2011 in the Sandy Bridge microarchitecture.
Mechanism
This feature is only available on Intel microprocessors that support Turbo Boost and have the feature enabled and supported (e.g. most OSs). Under various workloads, especially once that are relatively low in power demands and are lightly threaded or not threaded at all, the processor can take advantage of the headroom by increasing the clock frequency - while staying within thermal and electrical limits. The decision to kick into turbo boost is automatic and algorithmic in nature based on a number of factors such as: estimated current consumption, estimated power consumption, core temperature, and the number of active cores.
The number of active cores, which Intel defines as cores in "C0" or "C1" states ("C3" and "C6" states are 'inactive'), dictates the upper limit. Generally, the more active cores, the lower the highest clock frequency Turbo Boost can allow as it's easier to exceed various electrical limits. For example, a dual-core 2 GHz MPU may allow a boost of 266.66 MHz (to 2266.66 MHz) when a single core is active but only 133.33 MHz (to 2133.33 MHz) when two cores are active. (Note that if the thermal and electrical limits have been exceeded, Turbo Boost will be limited even further).
Some BIOS may allow for Turbo Boost to be disabled or enabled. Additionally, Turbo Boosts operates under the operating system's control and is engaged automatically when the OS requests the highest performance state ("P0"). The amount of time the processors remains in Turbo Boosts depends on the workload and OS requests. When Turbo Boost is active on a single core, it's active on all cores.
Upper limit based on active core count
The upper frequency limit depends on the active core count and the microarchitecture's BCLK. The turbo frequency per each number of active cores is some multiple of the base clock, which is listed below. The exact multiplayerrs is model-dependent.
µarch | BCLK |
---|---|
Nehalem | 133.33 MHz |
Westmere | 133.33 MHz |
Sandy Bridge | 100.00 MHz |
Ivy Bridge | 100.00 MHz |
Haswell | 100.00 MHz |
Broadwell | 100.00 MHz |
Skylake | 100.00 MHz |
Programmatically
The information about the upper limit of Turbo Boost for a specific processor can be obtained programmatically through the use of the Model-specific register. The value is the ratio (or multiplier) of BCLK.
For examples as to how it's done, see dump_nhm_turbo_ratio_limits(), dump_ivt_turbo_ratio_limits(), and dump_hsw_turbo_ratio_limits().
See also
designer | Intel + |
first launched | November 2008 + |
instance of | technology + |
name | Turbo Boost Technology + |