Semiconductor & Computer Engineering
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Difference between revisions of "intel/xeon d/d-1531"
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| − | The '''{{intel|Xeon D}}-1531''' is a {{arch|64}} | + | The '''{{intel|Xeon D}}-1531''' is a {{arch|64}} hexa-core [[x86-64]] microserver SoC that was introduced by [[Intel]] in November of 2015. The D-1531 operates at 2.2 GHz with a turbo frequency of 2.7 GHz. This chip, which is based on the [[intel/microarchitectures/broadwell|Broadwell]] [[microarchitecture]] and manufactured in [[14 nm process]], has a TDP of 45 W and can support up to 128 GB of RAM (DDR3L/DDR4). |
== Cache == | == Cache == | ||
Revision as of 01:14, 12 April 2016
Template:mpu The Xeon D-1531 is a 64-bit hexa-core x86-64 microserver SoC that was introduced by Intel in November of 2015. The D-1531 operates at 2.2 GHz with a turbo frequency of 2.7 GHz. This chip, which is based on the Broadwell microarchitecture and manufactured in 14 nm process, has a TDP of 45 W and can support up to 128 GB of RAM (DDR3L/DDR4).
Cache
- Main article: Broadwell's Cache
| Cache Info [Edit Values] | ||
| L1I$ | 192 KB "KB" is not declared as a valid unit of measurement for this property. |
6x32 KB 8-way set associative (per core) |
| L1D$ | 192 KB "KB" is not declared as a valid unit of measurement for this property. |
6x32 KB 8-way set associative (per core) |
| L2$ | 1,536 KB "KB" is not declared as a valid unit of measurement for this property. |
6x256 KB 8-way set associative (per core) |
| L3$ | 9 MB "MB" is not declared as a valid unit of measurement for this property. |
6x1.5 MB (per core) |
Graphics
This SoC has no integrated graphics processing unit.
Memory controller
| Integrated Memory Controller | |
| Type | DDR3L-1333, DDR3L-1600, DDR4-1600, DDR4-1867, DDR4-2133 |
| Controllers | 1 |
| Channels | 2 |
| ECC Support | Yes |
| Max memory | 128 GB |
Expansions
Networking
| Networking | |
| SFI interface | Yes |
| KR interface | No |
| 10Base-T | No |
| 100Base-T | No |
| 1000Base-T | Yes |
| 10GBase-T | Yes |
Features
Facts about "Xeon D-1531 - Intel"
| l1d$ description | 8-way set associative + |
| l1i$ description | 8-way set associative + |
| l2$ description | 8-way set associative + |