Semiconductor & Computer Engineering
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Difference between revisions of "Template:microarchitecture/doc"
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| phase-out = | | phase-out = | ||
| process = | | process = | ||
| − | | cores | + | | cores = |
| − | | cores | + | | cores 2 = |
| + | | cores N = | ||
| pipeline = <!-- yes for following options --> | | pipeline = <!-- yes for following options --> | ||
Revision as of 22:38, 7 April 2016
Code
{{microarchitecture
| name =
| manufacturer =
| introduction =
| phase-out =
| process =
| cores =
| cores 2 =
| cores N =
| pipeline = <!-- yes for following options -->
| type = <!-- e.g. "Superscalar" -->
| OoOE = <!-- Yes or No only -->
| isa =
| isa 2 =
| isa N =
| stages =
| ipc =
| inst = <!-- yes for instructions options -->
| feature =
| extension =
| cache = <!-- yes for cache info -->
| l1i =
| l1i per =
| l1i desc =
| l1d =
| l1d per =
| l1d desc =
| l2 =
| l2 per =
| l2 desc =
| succession = <!-- yes for succession info -->
| predecessor =
| predecessor link =
| successor =
| successor link =
}}