From WikiChip
Difference between revisions of "fairchild/f8"
< fairchild

(Created page with "{{fairchild title|F8}} {{ic family | title = Fairchild F8 | image = KL Fairchild F3850.jpg | caption = The F3850 CPU component | develope...")
 
(add info)
 
(2 intermediate revisions by 2 users not shown)
Line 22: Line 22:
 
| package 2        = DIP42
 
| package 2        = DIP42
 
}}
 
}}
−
The '''Fairchild F8''' was a family of multi-chip {{arch|8}} [[microprocessor]]s developed by [[Fairchild]] in 1974.
+
The '''Fairchild F8''' was a family of multi-chip {{arch|8}} [[microprocessor]]s developed by [[Fairchild]] in [[1974]].
 +
:Later, single-chip [[MCU]]s version of the system were also made.
  
 
== Members ==
 
== Members ==
Line 28: Line 29:
 
! Part !! Description
 
! Part !! Description
 
|-
 
|-
−
| {{\|3850}} || [[CPU]]
+
| {{\|3850}} || [[CPU]] • integrates 8-bit [[ALU]], 64-bytes scratchpad [[RAM]] and two 8-bit I/O ports
 
|-
 
|-
−
| {{\|3851}} || [[ROM]]
+
| {{\|3851}} || 1 KB [[ROM]] • Program Storage Unit (PSU)
 
|-
 
|-
−
| {{\|3852}} || Dynamic Memory Interface
+
| {{\|3852}} || Dynamic Memory Interface (DMI)
 
|-
 
|-
−
| {{\|3853}} || Static Memory Interface
+
| {{\|3853}} || Static Memory Interface (SMI)
 +
|-
 +
| {{\|3854}} || Direct Memory Access (DMA)
 +
|-
 +
| {{\|3856}} || 2 KB [[ROM]] • Program Storage Unit (PSU)
 +
|-
 +
| {{\|3861}} <br>{{\|3871}} || Parallel I/O Chip (PIO)
 
|-
 
|-
−
| {{\|3854}} || Direct Memory Access
 
 
|}
 
|}
  
Line 58: Line 64:
  
 
== Architecture ==
 
== Architecture ==
−
{{empty section}}
+
'''Fairchild F8''' or 3850 is a multi-chip microcontroller. The F8 is based on the 3850 chip - this chip integrates 8-bit [[ALU]], 64-bytes scratchpad RAM and two 8-bit I/O ports.
 +
 
 +
The 3850 does not decode instructions - 3851 or 3856 program storage unit (PSU) chips, dynamic memory interface (DMI) chip, 3853 static memory interface (SMI) chip or 3861/3871 parallel I/O (PIO) chips are used for this task. If necessary, multiple PSU, DMI, SMI and PIO chips can be used together with one 3850 ALU chip.
 +
 
 +
The PSU chips include the following on-chip features:
 +
*ROM: 1 KB for the 3851 and 2 KB for the 3856
 +
*Memory addressing logic
 +
*Two 8-bit I/O ports
 +
*Interrupt logic
 +
*Timer
 +
:SMI, DMI and PIO chips don't have on-chip ROM.
 +
 
 +
One-chip implementation of F8, [[Mostek]] 3870, was released in [[1977]].
  
 +
==Production chips==
 +
*[[Fairchild]] 3850PC • 40-pin plastic DIP
 +
*[[Fairchild]] 38501DC • 40-pin side-brazed ceramic DIP, White ceramic/gold lid/gold pins
  
−
{{stub}}
+
Mostek and Fairchild announced F8 second-source agreement in May - June [[1975]].
 +
:First Mostek F8 samples became available to customers in the middle of [[1975]].
 +
:[[Mostek]] produced all chips from F8 chipset.
 +
*Mostek MK3850N-3 • 40-pin plastic DIP • [https://www.cpu-world.com/info/Pinouts/3850.html Pinout]
 +
*Mostek MK3850N-10 • 40-pin plastic DIP

Latest revision as of 14:39, 21 October 2025

Fairchild F8
KL Fairchild F3850.jpg
The F3850 CPU component
Developer Fairchild
Manufacturer Fairchild
Type microprocessors, microcontrollers
Introduction 1973 (announced)
1975 (launch)
Production 1974
ISA F8
Word size 8 bit
1 octets
2 nibbles
Process 8 μm
8,000 nm
0.008 mm
Technology nMOS
Clock 1 MHz-4 MHz
Package DIP40, DIP42

The Fairchild F8 was a family of multi-chip 8-bit microprocessors developed by Fairchild in 1974.

Later, single-chip MCUs version of the system were also made.

Members[edit]

Part Description
3850 CPU • integrates 8-bit ALU, 64-bytes scratchpad RAM and two 8-bit I/O ports
3851 1 KB ROM • Program Storage Unit (PSU)
3852 Dynamic Memory Interface (DMI)
3853 Static Memory Interface (SMI)
3854 Direct Memory Access (DMA)
3856 2 KB ROM • Program Storage Unit (PSU)
3861
3871 		Parallel I/O Chip (PIO)

MCU[edit]

Fairchild later also produced a single-chip version of the F8 in 1977.

Part I/O Lines Regs RAM ROM Description
3870 32 64 B 64 B 4 kB
3872-1 32 64 B 64 B 1 kB
3872-2 32 64 B 64 B 2 kB
3872-3 32 64 B 64 B 3 kB
3872-4 32 64 B 64 B 4 kB
38L72 32 64 B 64 B 1-4 kB Low-power version of 3872

Architecture[edit]

Fairchild F8 or 3850 is a multi-chip microcontroller. The F8 is based on the 3850 chip - this chip integrates 8-bit ALU, 64-bytes scratchpad RAM and two 8-bit I/O ports.

The 3850 does not decode instructions - 3851 or 3856 program storage unit (PSU) chips, dynamic memory interface (DMI) chip, 3853 static memory interface (SMI) chip or 3861/3871 parallel I/O (PIO) chips are used for this task. If necessary, multiple PSU, DMI, SMI and PIO chips can be used together with one 3850 ALU chip.

The PSU chips include the following on-chip features:

  • ROM: 1 KB for the 3851 and 2 KB for the 3856
  • Memory addressing logic
  • Two 8-bit I/O ports
  • Interrupt logic
  • Timer
SMI, DMI and PIO chips don't have on-chip ROM.

One-chip implementation of F8, Mostek 3870, was released in 1977.

Production chips[edit]

  • Fairchild 3850PC • 40-pin plastic DIP
  • Fairchild 38501DC • 40-pin side-brazed ceramic DIP, White ceramic/gold lid/gold pins

Mostek and Fairchild announced F8 second-source agreement in May - June 1975.

First Mostek F8 samples became available to customers in the middle of 1975.
Mostek produced all chips from F8 chipset.
  • Mostek MK3850N-3 • 40-pin plastic DIP • Pinout
  • Mostek MK3850N-10 • 40-pin plastic DIP
Retrieved from "https://en.wikichip.org/w/index.php?title=fairchild/f8&oldid=103844"
Facts about "F8 - Fairchild"
RDF feed
designerFairchild +
first announced1973 +
first launched1975 +
full page namefairchild/f8 +
instance ofmicroprocessor family + and microcontroller family +
instruction set architectureF8 +
main designerFairchild +
manufacturerFairchild +
nameFairchild F8 +
packageDIP40 + and DIP42 +
process8,000 nm (8 μm, 0.008 mm) +
technologynMOS +
word size8 bit (1 octets, 2 nibbles) +