Semiconductor & Computer Engineering
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{{mmi title|5700/6700}} | {{mmi title|5700/6700}} | ||
| − | '''MMI 5700/6700''' | + | {{ic family |
| + | | title = Monolithic Memories 5700/6700 | ||
| + | | developer = Monolithic Memories | ||
| + | | manufacturer = Monolithic Memories | ||
| + | | type = microcontrollers | ||
| + | | production start = 1974 | ||
| + | | arch = 4-bit, bit-slice | ||
| + | | isa = 5700 | ||
| + | | word = 4 bit | ||
| + | | proc = | ||
| + | | tech = Schottky TTL | ||
| + | | clock min = 1 MHz | ||
| + | | clock max = 5 MHz | ||
| + | | package = DIP40 | ||
| + | }} | ||
| + | |||
| + | The '''MMI 5700/6700''' was a [[microprocessor family|family]] of {{arch|4}} [[bit-slice microcontroller]]s developed by [[Monolithic Memories]] Incorporated and introduced in [[1974]]. This series was sold as very simple [[MCU]]s aimed to replace what would otherwise be around 25-30 [[discrete logic]] chips. Typically multiple [[MCU]]s were hooked up together to create large [[data word]] sizes such as {{arch|8}} and {{arch|16}}. | ||
==2nd sources== | ==2nd sources== | ||
* [[ITT Semiconductors]] | * [[ITT Semiconductors]] | ||
| + | |||
| + | == Members == | ||
| + | {| class="wikitable" | ||
| + | ! Part !! Frequency !! Description | ||
| + | |- | ||
| + | | {{\|5701}} (MMI5701D) || 4 MHz || Commercial version | ||
| + | |- | ||
| + | | {{\|6701}} (MMI6701D) || 5 MHz || Military version | ||
| + | |} | ||
| + | |||
| + | == Design == | ||
| + | The [[Monolithic Memories]] 5701/6701 bit slice processor family was introduced in [[1974]]. This 4-bit processor could be used to build microprocessor systems of any word length in multiples of 4 - [[4-bit]], 8-bit, 12-bit, and so on. | ||
| + | |||
| + | The processor had 16 4-bit accumulators, one scratch accumulator, and came with 352 on-chip ROM, that was used to store instructions' microcode. Standard instruction set included 36 arithmetic and logic instructions, but, if desired, MMI could produce custom-order chips with client-specific instructions in the ROM. Processor instructions were complex, i.e. they could perform multiple operations at once - one arithmetic or logic instruction, and one or more of the following actions: load register, shift left or right, and store result. The 5701/6701 was capable of executing one instruction per cycle. | ||
| + | |||
| + | The 5701/6701 family consisted from two members: 5701 is a BSP operating in military temperature range, and | ||
| + | 6701 is a bit-slice processor operating in commercial temperature range. Both types of processors were manufactured in 40-pin ceramic DIP package. | ||
| + | |||
| + | == Documents == | ||
| + | * [[:File:MMI 5701-6701 MCU (August, 1974).pdf|MMI 5701/6701 MCU Datasheet]] | ||
{{stub}} | {{stub}} | ||
{{DEFAULTSORT:5700/6700}} | {{DEFAULTSORT:5700/6700}} | ||
| − | [[Category: | + | [[Category:monolithic memories microprocessors]] |
[[Category:4-bit microprocessors]] | [[Category:4-bit microprocessors]] | ||
[[Category:1974 microprocessors]] | [[Category:1974 microprocessors]] | ||
[[Category:microprocessor families]] | [[Category:microprocessor families]] | ||
| − | |||
Latest revision as of 09:25, 21 October 2025
| Monolithic Memories 5700/6700 | |
.svg)
| |
| Developer | Monolithic Memories |
| Manufacturer | Monolithic Memories |
| Type | microcontrollers |
| Production | 1974 |
| Architecture | 4-bit, bit-slice |
| ISA | 5700 |
| Word size | 4 bit 0.5 octets
1 nibbles |
| Technology | Schottky TTL |
| Clock | 1 MHz-5 MHz |
| Package | DIP40 |
The MMI 5700/6700 was a family of 4-bit bit-slice microcontrollers developed by Monolithic Memories Incorporated and introduced in 1974. This series was sold as very simple MCUs aimed to replace what would otherwise be around 25-30 discrete logic chips. Typically multiple MCUs were hooked up together to create large data word sizes such as 8-bit and 16-bit.
Contents
2nd sources[edit]
Members[edit]
| Part | Frequency | Description |
|---|---|---|
| 5701 (MMI5701D) | 4 MHz | Commercial version |
| 6701 (MMI6701D) | 5 MHz | Military version |
Design[edit]
The Monolithic Memories 5701/6701 bit slice processor family was introduced in 1974. This 4-bit processor could be used to build microprocessor systems of any word length in multiples of 4 - 4-bit, 8-bit, 12-bit, and so on.
The processor had 16 4-bit accumulators, one scratch accumulator, and came with 352 on-chip ROM, that was used to store instructions' microcode. Standard instruction set included 36 arithmetic and logic instructions, but, if desired, MMI could produce custom-order chips with client-specific instructions in the ROM. Processor instructions were complex, i.e. they could perform multiple operations at once - one arithmetic or logic instruction, and one or more of the following actions: load register, shift left or right, and store result. The 5701/6701 was capable of executing one instruction per cycle.
The 5701/6701 family consisted from two members: 5701 is a BSP operating in military temperature range, and 6701 is a bit-slice processor operating in commercial temperature range. Both types of processors were manufactured in 40-pin ceramic DIP package.
Documents[edit]
 |
This article is still a stub and needs your attention. You can help improve this article by editing this page and adding the missing information. |
| designer | Monolithic Memories + |
| full page name | monolithic memories/5700 + |
| instance of | microcontroller family + |
| instruction set architecture | 5700 + |
| main designer | Monolithic Memories + |
| manufacturer | Monolithic Memories + |
| name | Monolithic Memories 5700/6700 + |
| package | DIP40 + |
| technology | Schottky TTL + |
| word size | 4 bit (0.5 octets, 1 nibbles) + |