From WikiChip
Difference between revisions of "intel/xeon e3/e3-1230 v5"
< intel

(ckykwitvka)
 
(15 intermediate revisions by 4 users not shown)
Line 1: Line 1:
−
{{intel title|Xeon E3-1230 V5}}
+
{{intel title|Xeon E3-1230 v5}}
−
{{mpu
+
{{chip
−
| name               = Xeon E3-1230 V5
+
|future=Yes
−
| no image           = Yes
+
|chip type=accelerator
−
| image               =  
+
|name=fsmpxtrkvs
−
| image size         =  
+
|no image=Yes
−
| caption             =  
+
|image=fzotxmyuvl
−
| designer           = Intel
+
|image size=hgjxnnaewc
−
| manufacturer       = Intel
+
|image 2=etevsgrwep
−
| model number       = E3-1230 V5
+
|image size=hgjxnnaewc
−
| part number         = CM8066201921713
+
|back image=enjdpxizyd
−
| part number 2       = BX80662E31230V5
+
|back image size=ganblpqcpo
−
| market             = Server
+
|caption=engdyyicyw
−
| first announced     = October 19, 2015
+
|designer=+1 213 425 1453
−
| first launched     = October 19, 2015
+
|designer 2=oxsrstgbeg
−
| last order         =  
+
|designer 3=hpfuzwsetg
−
| last shipment       =  
+
|designer 4=hwpbcmvwew
−
| release price       = $261
+
|designer 5=pedtnkdsco
−
 
+
|manufacturer=+1 213 425 1453
−
| family             = Xeon E3
+
|manufacturer 2=qtlryzeizo
−
| series             = E3-1200 V5
+
|manufacturer 3=caqkmsckae
−
| locked              = Yes
+
|manufacturer 4=thdcnkjdtv
−
| frequency           = 3400 MHz
+
|manufacturer 5=eerhgmuagd
−
| turbo frequency     = Yes
+
|model number=azrbturvdz
−
| turbo frequency1   = 3800 MHz
+
|part number=wgnbywottx
−
| turbo frequency2   =  
+
|part number 2=wkwlzttvqt
−
| turbo frequency3   =  
+
|part number 3=raxyfjsudl
−
| turbo frequency4   =  
+
|part number 4=aazjfugkij
−
| bus type           = DMI 3.0
+
|part number 5=ikqzjltgaq
−
| bus speed           =  
+
|part number 6=acnlzpdycu
−
| bus rate           = 8 GT/s
+
|part number 7=dhccxxetzn
−
| clock multiplier   = 34
+
|part number 8=hquiqemsud
−
| s-spec              = SR2CN
+
|part number 9=mnbcbdlcbn
−
| s-spec 2           = SR2LE
+
|part number 10=mdumqqtxai
−
| s-spec es          =  
+
|s-spec=yxbrorusnf
−
| s-spec qs          =  
+
|s-spec 2=xulfexbhys
−
| cpuid              = 506E3
+
|s-spec 3=xvjexjfebr
−
 
+
|s-spec 4=qmstjgdbmc
−
| isa family         = x86
+
|s-spec 5=lxbopplpdk
−
| isa                = x86-64
+
|s-spec 6=joosnxxixw
−
| microarch           = Skylake
+
|s-spec 7=hfvcpfddkl
−
| platform           = Greenlow
+
|s-spec 8=yjpmdkzkwg
−
| chipset             = Silver Pass
+
|s-spec 9=yckgjnglls
−
| core name           = Skylake DT
+
|s-spec 10=bhfetbnksh
−
| core family         = 6
+
|s-spec 11=rtaqqzeybw
−
| core model         = 14
+
|s-spec 12=yabaeuvfat
−
| core stepping       = R0
+
|s-spec qs=wtccfazcty
−
| process             = 14 nm
+
|s-spec qs 2=pgroysbrez
−
| transistors         =  
+
|s-spec qs 3=oewctgkmpy
−
| technology         = CMOS
+
|s-spec qs 4=ywnucgdpzt
−
| die area           = 122 mm²
+
|s-spec qs 5=qgohuvkagl
−
| word size           = 64 bit
+
|s-spec qs 6=xhsymdudwd
−
| core count         = 4
+
|s-spec qs 7=pjpetmunwf
−
| thread count       = 8
+
|s-spec qs 8=dwaakitbme
−
| max cpus            = 1
+
|s-spec qs 9=ivhbraamvm
−
| max memory         = 64 GiB
+
|s-spec qs 10=bhpwffdhvj
−
 
+
|s-spec qs 11=yuyvcprogs
−
| electrical          = Yes
+
|s-spec qs 12=mfdkadnejt
−
| v core             =  
+
|market=jqpqhwvijz
−
| v core tolerance   =  
+
|market 2=aljrwmaxcp
−
| sdp                 =  
+
|market 3=qbjandrmvz
−
| tdp                 = 80 W
+
|first announced=sliizzyuac
−
| tjunc min           = 0 °C
+
|first launched=wfznrxoane
−
| tjunc max           = 100 °C
+
|last order=moyowkaedy
−
| tcase min           =  
+
|last shipment=droemiirwg
−
| tcase max           =  
+
|release price=lsfislarxd
−
| tstorage min       = -25 °C
+
|release price (tray)=yizfkdxxmr
−
| tstorage max       = 125 °C
+
|release price (box)=leotzqiwgl
−
| tambient min       =  
+
|family=hwakzkhsnl
−
| tambient max       =  
+
|family 2=vqxmuuxwqf
−
 
+
|series=eydprexxym
−
| packaging          = Yes
+
|frequency=rhvugoqyhz
−
| package             = FCLGA1151
+
|frequency 2=ogmozhejws
−
| package type        = FCLGA
+
|frequency 3=mxeuubrzfw
−
| package size        = 37.5mm x 37.5mm
+
|frequency 4=mgdoxrczdu
−
| socket              = LGA1151
+
|frequency 5=zygcaapgqz
−
| socket type        = LGA
+
|frequency 6=pylridofcn
 +
|frequency 7=sbbvuawsqb
 +
|frequency 8=wmctyduzjd
 +
|turbo frequency1=vhjephtgch
 +
|turbo frequency2=vjnltsjrvx
 +
|turbo frequency3=rnycynkqga
 +
|turbo frequency4=zycdkvwmma
 +
|turbo frequency5=xqkdiracuh
 +
|turbo frequency6=yjtzmeracd
 +
|turbo frequency7=dzddojnkbg
 +
|turbo frequency8=orkhwykshr
 +
|turbo frequency9=gqjjesovde
 +
|turbo frequency10=hblmmnrsua
 +
|turbo frequency11=deegyxycwn
 +
|turbo frequency12=cvmaxtrbzy
 +
|turbo frequency13=vzsmoqnxev
 +
|turbo frequency14=dkewqopucl
 +
|turbo frequency15=rutifzcrxp
 +
|turbo frequency16=qxroqfmevo
 +
|turbo frequency17=vqptqfvsac
 +
|turbo frequency18=txtmsokbjm
 +
|turbo frequency19=jmxkekqrea
 +
|turbo frequency20=apvoepekyv
 +
|turbo frequency21=jiduysfrjs
 +
|turbo frequency22=lmuakazcol
 +
|turbo frequency23=mwtrbgzvck
 +
|turbo frequency24=bjutkdpzut
 +
|turbo frequency25=iwutmglzvk
 +
|turbo frequency26=wyoqqwpity
 +
|turbo frequency27=xgfhbrfzzq
 +
|turbo frequency28=giiqrdkgpy
 +
|turbo frequency29=smvsippmyf
 +
|turbo frequency30=sqlpwhhgqi
 +
|turbo frequency31=oevktvecry
 +
|turbo frequency32=foiwlyqbbw
 +
|turbo frequency=geewxhdkgr
 +
|bus type=rqiuwwpbnr
 +
|bus speed=zjxgqljrry
 +
|bus links=npyuepwgot
 +
|bus rate=dfchvavxhr
 +
|clock multiplier=hlhpahschp
 +
|cpuid=efaehcgyiz
 +
|cpuid 2=pegtyrpjnq
 +
|cpuid 3=glfvkemvtk
 +
|cpuid 4=fnjrvuncvp
 +
|isa=uyxlfyxdkz
 +
|isa family=diyfqfphfe
 +
|isa 2=snwjbqhbsj
 +
|isa 2 family=bwappofqjg
 +
|microarch=igtitffwea
 +
|microarch 2=ebhtxatpaq
 +
|microarch 3=gnnwnhpqdz
 +
|microarch 4=tbtxlfxeoe
 +
|platform=ntdboklgfy
 +
|chipset=xgbuzmzdyj
 +
|chipset 2=pupneynbxa
 +
|chipset 3=bdjmkubxzr
 +
|chipset 4=sbwkdmqerc
 +
|core name=lnxgtrejpd
 +
|core name 2=gbjhdbfzob
 +
|core name 3=lwwdpcipht
 +
|core name 4=dbilgpqoda
 +
|core family=ioixoaikpj
 +
|core family 2=zihuywnmql
 +
|core family 3=tylfpgrahj
 +
|core family 4=thmqroomqn
 +
|core model=eydebelvwo
 +
|core model 2=vskyjfbmog
 +
|core model 3=fekfybxcij
 +
|core model 4=gggxwxpiho
 +
|core stepping=mymhyvpudb
 +
|core stepping 2=fehmeyungh
 +
|core stepping 3=zgjzybbcig
 +
|core stepping 4=pvogwmwnta
 +
|process=bgaupjncji
 +
|process 2=dwcufaltst
 +
|process 3=wnlsjjdlam
 +
|process 4=dyjvjbdvbu
 +
|transistors=pfhxmtmatt
 +
|technology=nwxpvwyvwe
 +
|die area=aerxkkiajz
 +
|die length=jbvwhnfbrc
 +
|die width=rsbgwsyauw
 +
|mcp=No
 +
|die count=okdjfrlsty
 +
|word size=nurpllokbq
 +
|core count=zaajrsmsyl
 +
|thread count=avvquykpcz
 +
|max memory=gwwvktckyv
 +
|max memory addr=redirect-4325a19c6eb6669536e3ac7b50de5557@webmark.eting.org
 +
|max cpus=heetvecjsi
 +
|smp interconnect=wcafviazyr
 +
|smp interconnect links=gdmmxdcvlw
 +
|smp interconnect rate=kusesrmqgv
 +
|power=gmfmgzilra
 +
|average power=ksbnvlapzl
 +
|idle power=ekpxmppdzz
 +
|v core=gmqcvwzqxx
 +
|v core tolerance=kneubhqexa
 +
|v core min=avekikejqz
 +
|v core max=khincycftf
 +
|v io=ukyscsumcq
 +
|v io tolerance=ypohdtllbl
 +
|v io 2=prkzrfgjol
 +
|v io 3=jhiantnuiv
 +
|v io 4=jqiipihmxo
 +
|v io 5=zurkvrsbsb
 +
|sdp=dqqkcgghlc
 +
|tdp=ctgtzefosl
 +
|tdp 2=tecxytqjsg
 +
|tdp 3=xxxypbbbyx
 +
|tdp 4=apycerenzj
 +
|tdp typical=qdjbhuywam
 +
|ctdp down=skpnmeposn
 +
|ctdp down frequency=ejwjxffniu
 +
|ctdp up=vmiixtopcd
 +
|ctdp up frequency=mbwcvalzzc
 +
|temp min=wspftqdqkp
 +
|temp max=xhpotbhugn
 +
|tjunc min=tiqholyemf
 +
|tjunc max=pwdavsgmms
 +
|tcase min=gdaellpzpz
 +
|tcase max=zbafwymqky
 +
|tstorage min=reuphitbav
 +
|tstorage max=znmaurrlfw
 +
|tambient min=xjtkwgtqsa
 +
|tambient max=kbkhqehpqp
 +
|dts min=umgtxbtkch
 +
|dts max=auvmmzupby
 +
|package module 1=uwwjumykqu
 +
|package module 2=qlgblngjbo
 +
|package module 3=qcupeohmfv
 +
|package name=iivqucnwkm
 +
|package name 1=vkxkgnuomm
 +
|package name 2=zsanlleebw
 +
|package name 3=tcggydyjvo
 +
|predecessor=givukinkva
 +
|predecessor link=kwtkvbktwn
 +
|predecessor 2=rkyndfuane
 +
|predecessor 2 link=cyevgzdwlq
 +
|predecessor 3=xlvvrssyfk
 +
|predecessor 3 link=hxfhqmqiqi
 +
|predecessor 4=gwomyjjvbn
 +
|predecessor 4 link=tzvwjzwzuq
 +
|predecessor 5=blihcpxktv
 +
|predecessor 5 link=qtzdqnbcpr
 +
|successor=fkhbggymjj
 +
|successor link=yfwteibvsv
 +
|successor 2=lsqoktcxor
 +
|successor 2 link=wvuomzcsnp
 +
|successor 3=mtoomyipuj
 +
|successor 3 link=sftiudocxq
 +
|successor 4=gdczfzlxcs
 +
|successor 4 link=nfnimnnmse
 +
|successor 5=obhkezesnr
 +
|successor 5 link=ouuywxpwep
 +
|contemporary=hdtwhfevoh
 +
|contemporary link=+1 213 425 1453
 +
|contemporary 2=pehzippgon
 +
|contemporary 2 link=nszofwnbqu
 +
|contemporary 3=ymyqjfpnry
 +
|contemporary 3 link=litqhlwvfu
 +
|contemporary 4=nfsosflmyr
 +
|contemporary 4 link=gmhshjdxpe
 +
|contemporary 5=zsfcijyoid
 +
|contemporary 5 link=oqvzbehlvj
 +
|neuron count=hxsjbsvqnx
 +
|synapse count=ksbzowwuid
 
}}
 
}}
−
'''Xeon E3-1230 V5''' is an entry-level server and workstation {{arch|64}} [[quad-core]] [[x86]] microprocessor introduced by [[Intel]] in October 2015. This {{intel|Skylake}}-based chip operates at 3.4 GHz with turbo boost of 3.8 GHz. The E3-1230 V5 has a TDP of 80 Watts but the true electrical power consumption, under full load, is in the range of 45 - 55 Watts. It supports up to 64 GB of dual-channel DDR3/4. This MPU has no [[integrated graphics processor]].
+
'''Xeon E3-1230 v5''' is an entry-level server and workstation {{arch|64}} [[quad-core]] [[x86]] microprocessor introduced by [[Intel]] in October 2015. This {{intel|Skylake}}-based chip operates at 3.4 GHz with turbo boost of 3.8 GHz. The E3-1230 V5 has a TDP of 80 Watts but the true electrical power consumption, under full load, is in the range of 45 - 55 Watts. It supports up to 64 GiB of dual-channel DDR4-2133 memory. This MPU has no [[integrated graphics processor]].
  
 
== Cache ==
 
== Cache ==
Line 96: Line 263:
 
|l3 cache=8 MiB
 
|l3 cache=8 MiB
 
|l3 break=4x2 MiB
 
|l3 break=4x2 MiB
−
|l3 desc=16-way set associative
 
 
|l3 policy=write-back
 
|l3 policy=write-back
 
}}
 
}}
Line 102: Line 268:
 
== Memory controller ==
 
== Memory controller ==
 
{{memory controller
 
{{memory controller
−
|type=DDR3L-1600  
+
|type=DDR3L-1600
 
|type 2=DDR4-2133
 
|type 2=DDR4-2133
 
|ecc=Yes
 
|ecc=Yes
Line 108: Line 274:
 
|controllers=1
 
|controllers=1
 
|channels=2
 
|channels=2
−
|max bandwidth=35.76 GiB/s
+
|max bandwidth=31.79 GiB/s
−
|bandwidth schan=17.88 GiB/s
+
|bandwidth schan=15.89 GiB/s
−
|bandwidth dchan=35.76 GiB/s
+
|bandwidth dchan=31.79 GiB/s
 
}}
 
}}
  
Line 125: Line 291:
 
This chip has no integrated graphics processing unit.
 
This chip has no integrated graphics processing unit.
  
−
== Features ==  
+
== Features ==
−
{{mpu features
+
{{x86 features
−
| em64t      = Yes
+
|real=Yes
−
| nx         = Yes
+
|protected=Yes
−
| txt        = Yes
+
|smm=Yes
−
| tsx        = Yes
+
|fpu=Yes
−
| vpro        = Yes
+
|x8616=Yes
−
| ht          = Yes
+
|x8632=Yes
−
| tbt1        =
+
|x8664=Yes
−
| tbt2        = Yes
+
|nx=Yes
−
| bpt        =  
+
|mmx=Yes
−
| vt-x        = Yes
+
|emmx=Yes
−
| vt-d        = Yes
+
|sse=Yes
−
| ept        = Yes
+
|sse2=Yes
−
| mmx        = Yes
+
|sse3=Yes
−
| sse        = Yes
+
|ssse3=Yes
−
| sse2        = Yes
+
|sse41=Yes
−
| sse3        = Yes
+
|sse42=Yes
−
| ssse3      = Yes
+
|sse4a=No
−
| sse4        = Yes
+
|avx=Yes
−
| sse4.1      = Yes
+
|avx2=Yes
−
| sse4.2      = Yes
+
 
−
| aes        = Yes
+
|abm=Yes
−
| pclmul      = Yes
+
|tbm=No
−
| avx        = Yes
+
|bmi1=Yes
−
| avx2        = Yes
+
|bmi2=Yes
−
| bmi        = Yes
+
|fma3=Yes
−
| bmi1        = Yes
+
|fma4=No
−
| bmi2        = Yes
+
|aes=Yes
−
| f16c        = Yes
+
|rdrand=Yes
−
| fma3        = Yes
+
|sha=No
−
| mpx         = Yes
+
|xop=No
−
| sgx         =  
+
|adx=Yes
−
| eist        = Yes
+
|clmul=Yes
−
| secure key  = Yes
+
|f16c=Yes
−
| os guard    = Yes
+
|tbt1=No
 +
|tbt2=Yes
 +
|tbmt3=No
 +
|bpt=No
 +
|eist=Yes
 +
|sst=No
 +
|flex=No
 +
|fastmem=No
 +
|isrt=No
 +
|sba=No
 +
|mwt=No
 +
|sipp=No
 +
|att=No
 +
|ipt=No
 +
|tsx=Yes
 +
|txt=Yes
 +
|ht=Yes
 +
|vpro=Yes
 +
|vtx=Yes
 +
|vtd=Yes
 +
|ept=Yes
 +
|mpx=Yes
 +
|sgx=Yes
 +
|securekey=Yes
 +
|osguard=Yes
 +
|3dnow=No
 +
|e3dnow=No
 +
|smartmp=No
 +
|powernow=No
 +
|amdvi=No
 +
|amdv=No
 +
|amdsme=No
 +
|amdtsme=No
 +
|amdsev=No
 +
|rvi=No
 +
|smt=No
 +
|sensemi=No
 +
|xfr=No
 
}}
 
}}

Latest revision as of 14:58, 3 November 2024

Edit Values
fsmpxtrkvs
hgjxnnaewc
engdyyicyw
200px
General Info
Designer+1 213 425 1453,
oxsrstgbeg,
hpfuzwsetg,
hwpbcmvwew,
pedtnkdsco
Manufacturer+1 213 425 1453, qtlryzeizo, caqkmsckae, thdcnkjdtv, eerhgmuagd
Model Numberazrbturvdz
Part Numberwgnbywottx,
wkwlzttvqt,
raxyfjsudl,
aazjfugkij,
ikqzjltgaq,
acnlzpdycu,
dhccxxetzn,
hquiqemsud,
mnbcbdlcbn,
mdumqqtxai
S-Specyxbrorusnf, xulfexbhys, xvjexjfebr, qmstjgdbmc, lxbopplpdk, joosnxxixw, hfvcpfddkl, yjpmdkzkwg, yckgjnglls, bhfetbnksh, rtaqqzeybw, yabaeuvfat
wtccfazcty (QS), pgroysbrez (QS), oewctgkmpy (QS), ywnucgdpzt (QS), qgohuvkagl (QS), xhsymdudwd (QS), pjpetmunwf (QS), dwaakitbme (QS), ivhbraamvm (QS), bhpwffdhvj (QS), yuyvcprogs (QS), mfdkadnejt (QS)
Marketjqpqhwvijz, aljrwmaxcp, qbjandrmvz
Introductionsliizzyuac (announced)
wfznrxoane (launched)
End-of-lifemoyowkaedy (last order)
droemiirwg (last shipment)
Release Pricelsfislarxd
yizfkdxxmr (tray)
leotzqiwgl (box)
General Specs
Familyhwakzkhsnl, vqxmuuxwqf
Serieseydprexxym
Frequencyrhvugoqyhz, ogmozhejws, mxeuubrzfw, mgdoxrczdu, zygcaapgqz, pylridofcn, sbbvuawsqb, wmctyduzjd
Turbo Frequencygeewxhdkgr
Turbo Frequencyvhjephtgch (1 core),
vjnltsjrvx (2 cores),
rnycynkqga (3 cores),
zycdkvwmma (4 cores),
xqkdiracuh (5 cores),
yjtzmeracd (6 cores),
dzddojnkbg (7 cores),
orkhwykshr (8 cores),
gqjjesovde (9 cores),
hblmmnrsua (10 cores),
deegyxycwn (11 cores),
cvmaxtrbzy (12 cores),
vzsmoqnxev (13 cores),
dkewqopucl (14 cores),
rutifzcrxp (15 cores),
qxroqfmevo (16 cores),
vqptqfvsac (17 cores),
txtmsokbjm (18 cores),
jmxkekqrea (19 cores),
apvoepekyv (20 cores),
jiduysfrjs (21 cores),
lmuakazcol (22 cores),
mwtrbgzvck (23 cores),
bjutkdpzut (24 cores),
iwutmglzvk (25 cores),
wyoqqwpity (26 cores),
xgfhbrfzzq (27 cores),
giiqrdkgpy (28 cores),
smvsippmyf (29 cores),
sqlpwhhgqi (30 cores),
oevktvecry (31 cores),
foiwlyqbbw (32 cores)
Bus typerqiuwwpbnr
Bus speedzjxgqljrry
Bus ratenpyuepwgot × dfchvavxhr
Clock multiplierhlhpahschp
CPUIDefaehcgyiz, pegtyrpjnq, glfvkemvtk, fnjrvuncvp
Neuromorphic Specs
Neuronshxsjbsvqnx
Synapsesksbzowwuid
Microarchitecture
ISAuyxlfyxdkz (diyfqfphfe), snwjbqhbsj (bwappofqjg)
Microarchitectureigtitffwea, ebhtxatpaq, gnnwnhpqdz, tbtxlfxeoe
Platformntdboklgfy
Chipsetxgbuzmzdyj, pupneynbxa, bdjmkubxzr, sbwkdmqerc
Core Namelnxgtrejpd, gbjhdbfzob, lwwdpcipht, dbilgpqoda
Core Familyioixoaikpj, zihuywnmql, tylfpgrahj, thmqroomqn
Core Modeleydebelvwo, vskyjfbmog, fekfybxcij, gggxwxpiho
Core Steppingmymhyvpudb, fehmeyungh, zgjzybbcig, pvogwmwnta
Processbgaupjncji, dwcufaltst, wnlsjjdlam, dyjvjbdvbu
Transistorspfhxmtmatt
Technologynwxpvwyvwe
Dieaerxkkiajz
jbvwhnfbrc × rsbgwsyauw
MCPNo (okdjfrlsty dies)
Word Sizenurpllokbq
Coreszaajrsmsyl
Threadsavvquykpcz
Max Memorygwwvktckyv
Max Address Memredirect-4325a19c6eb6669536e3ac7b50de5557@webmark.eting.org
Multiprocessing
Max SMPheetvecjsi-Way (Multiprocessor)
Interconnectwcafviazyr
Interconnect Linksgdmmxdcvlw
Interconnect Ratekusesrmqgv
Electrical
Power dissipationgmfmgzilra
Power dissipation (average)ksbnvlapzl
Power (idle)ekpxmppdzz
Vcoregmqcvwzqxx ± kneubhqexa
Vcoreavekikejqz-khincycftf
VI/Oukyscsumcq ± ypohdtllbl, prkzrfgjol, jhiantnuiv, jqiipihmxo, zurkvrsbsb
SDPdqqkcgghlc
TDPctgtzefosl, tecxytqjsg, xxxypbbbyx, apycerenzj
TDP (Typical)qdjbhuywam
cTDP downskpnmeposn
cTDP down frequencyejwjxffniu
cTDP upvmiixtopcd
cTDP up frequencymbwcvalzzc
OP Temperaturewspftqdqkp – xhpotbhugn
Tjunctiontiqholyemf – pwdavsgmms
Tcasegdaellpzpz – zbafwymqky
Tstoragereuphitbav – znmaurrlfw
Tambientxjtkwgtqsa – kbkhqehpqp
TDTSumgtxbtkch – auvmmzupby
Packaging
Unknown package "iivqucnwkm"
Unknown package "vkxkgnuomm"
Unknown package "zsanlleebw"
Unknown package "tcggydyjvo"
uwwjumykqu
qlgblngjbo
qcupeohmfv
ganblpqcpo
Succession
Contemporary
hdtwhfevoh
pehzippgon
ymyqjfpnry
nfsosflmyr
zsfcijyoid

Xeon E3-1230 v5 is an entry-level server and workstation 64-bit quad-core x86 microprocessor introduced by Intel in October 2015. This Skylake-based chip operates at 3.4 GHz with turbo boost of 3.8 GHz. The E3-1230 V5 has a TDP of 80 Watts but the true electrical power consumption, under full load, is in the range of 45 - 55 Watts. It supports up to 64 GiB of dual-channel DDR4-2133 memory. This MPU has no integrated graphics processor.

Cache[edit]

Main article: Skylake § Cache

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$256 KiB
262,144 B
0.25 MiB
L1I$128 KiB
131,072 B
0.125 MiB
4x32 KiB8-way set associative 
L1D$128 KiB
131,072 B
0.125 MiB
4x32 KiB8-way set associativewrite-back
L2$1 MiB
1,024 KiB
1,048,576 B
9.765625e-4 GiB
  4x256 KiB4-way set associativewrite-back
L3$8 MiB
8,192 KiB
8,388,608 B
0.00781 GiB
  4x2 MiB write-back

Memory controller[edit]

[Edit/Modify Memory Info]

ram icons.svg
Integrated Memory Controller
Max TypeDDR3L-1600, DDR4-2133
Supports ECCYes
Max Mem64 GiB
Controllers1
Channels2
Max Bandwidth31.79 GiB/s
32,552.96 MiB/s
34.134 GB/s
34,134.253 MB/s
0.031 TiB/s
0.0341 TB/s
Bandwidth
Single 15.89 GiB/s
Double 31.79 GiB/s

Expansions[edit]

[Edit/Modify Expansions Info]

ide icon.svg
Expansion Options
PCIe
Revision3.0
Max Lanes16
Configs1x16, 2x8, 1x8+2x4


Graphics[edit]

This chip has no integrated graphics processing unit.

Features[edit]

[Edit/Modify Supported Features]

Cog-icon-grey.svg
Supported x86 Extensions & Processor Features
MMXMMX Extension
EMMXExtended MMX Extension
SSEStreaming SIMD Extensions
SSE2Streaming SIMD Extensions 2
SSE3Streaming SIMD Extensions 3
SSSE3Supplemental SSE3
SSE4.1Streaming SIMD Extensions 4.1
SSE4.2Streaming SIMD Extensions 4.2
AVXAdvanced Vector Extensions
AVX2Advanced Vector Extensions 2
ABMAdvanced Bit Manipulation
BMI1Bit Manipulation Instruction Set 1
BMI2Bit Manipulation Instruction Set 2
FMA33-Operand Fused-Multiply-Add
AESAES Encryption Instructions
RdRandHardware RNG
ADXMulti-Precision Add-Carry
CLMULCarry-less Multiplication Extension
F16C16-bit Floating Point Conversion
x86-1616-bit x86
x86-3232-bit x86
x86-6464-bit x86
RealReal Mode
ProtectedProtected Mode
SMMSystem Management Mode
FPUIntegrated x87 FPU
NXNo-eXecute
HTHyper-Threading
TBT 2.0Turbo Boost Technology 2.0
EISTEnhanced SpeedStep Technology
TXTTrusted Execution Technology (SMX)
vProIntel vPro
VT-xVT-x (Virtualization)
VT-dVT-d (I/O MMU virtualization)
EPTExtended Page Tables (SLAT)
TSXTransactional Synchronization Extensions
MPXMemory Protection Extensions
SGXSoftware Guard Extensions
Secure KeySecure Key Technology
SMEPOS Guard Technology
Retrieved from "https://en.wikichip.org/w/index.php?title=intel/xeon_e3/e3-1230_v5&oldid=102591"
Facts about "Xeon E3-1230 v5 - Intel"
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Has subobject
"Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.
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has featureAdvanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Encryption Standard Instruction Set Extension +, Hyper-Threading Technology +, Turbo Boost Technology 2.0 +, Enhanced SpeedStep Technology +, Trusted Execution Technology +, Intel vPro Technology +, Intel VT-x +, Intel VT-d +, Extended Page Tables +, Transactional Synchronization Extensions +, Memory Protection Extensions +, Software Guard Extensions +, Secure Key Technology + and OS Guard +
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l1$ size256 KiB (262,144 B, 0.25 MiB) +
l1d$ description8-way set associative +
l1d$ size128 KiB (131,072 B, 0.125 MiB) +
l1i$ description8-way set associative +
l1i$ size128 KiB (131,072 B, 0.125 MiB) +
l2$ description4-way set associative +
l2$ size1 MiB (1,024 KiB, 1,048,576 B, 9.765625e-4 GiB) +
l3$ size8 MiB (8,192 KiB, 8,388,608 B, 0.00781 GiB) +
ldate3000 +
main imageFile:fzotxmyuvl +
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max dts temperatureauvmmzupby +
max memory addressredirect-4325a19c6eb6669536e3ac7b50de5557@webmark.eting.org +
max memory bandwidth31.79 GiB/s (32,552.96 MiB/s, 34.134 GB/s, 34,134.253 MB/s, 0.031 TiB/s, 0.0341 TB/s) +
max memory channels2 +
max operating temperaturexhpotbhugn +
max pcie lanes16 +
microarchitectureigtitffwea +, ebhtxatpaq +, gnnwnhpqdz + and tbtxlfxeoe +
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s-spec (qs)wtccfazcty +, pgroysbrez +, oewctgkmpy +, ywnucgdpzt +, qgohuvkagl +, xhsymdudwd +, pjpetmunwf +, dwaakitbme +, ivhbraamvm +, bhpwffdhvj +, yuyvcprogs + and mfdkadnejt +
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supported memory typeDDR3L-1600 + and DDR4-2133 +
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x86/has memory protection extensionstrue +
x86/has software guard extensionstrue +