Semiconductor & Computer Engineering
From WikiChip
Difference between revisions of "annapurna labs/alpine"
(→Members: as used in QNAP TS-431KX) |
|||
| Line 30: | Line 30: | ||
== Members == | == Members == | ||
* {{\|AL212}} | * {{\|AL212}} | ||
| + | * {{\|AL214}} | ||
* {{\|AL314}} | * {{\|AL314}} | ||
* {{\|AL324}} | * {{\|AL324}} | ||
Latest revision as of 12:07, 31 May 2024
| Alpine | |
| Developer | Annapurna Labs |
| Manufacturer | TSMC |
| Type | system on chips |
| Introduction | January 6, 2016 (announced) January 6, 2016 (launch) |
| ISA | ARM |
| µarch | ARM7, Cortex-A15, Cortex-A57, Cortex-A72 |
| Word size | 32 bit 4 octets , 64 bit8 nibbles 8 octets
16 nibbles |
| Technology | CMOS |
| → | |
| Graviton | |
Alpine is a family of ARM SoCs designed by Annapurna Labs and introduced in 2016 for embedded networking devices. Alpine chips are found in various home gateways, routers, NAS devices, and other network devices. This series of SoCs was phased out in 2018 as the company shifted focus to high-performance server processors, Graviton, following the company's acquisition by Amazon.
Members[edit]
Facts about "Alpine - Annapurna Labs (Amazon)"
| designer | Annapurna Labs + |
| first announced | January 6, 2016 + |
| first launched | January 6, 2016 + |
| full page name | annapurna labs/alpine + |
| instance of | system on a chip family + |
| instruction set architecture | ARM + |
| main designer | Annapurna Labs + |
| manufacturer | TSMC + |
| microarchitecture | ARM7 +, Cortex-A15 +, Cortex-A57 + and Cortex-A72 + |
| name | Alpine + |
| technology | CMOS + |
| word size | 32 bit (4 octets, 8 nibbles) + and 64 bit (8 octets, 16 nibbles) + |