Semiconductor & Computer Engineering
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Each [[process node]] can be analyzed and characterized based on the three major components known as power, performance, and area. The three components dictate the capabilities of the integrated circuits fabricated on it. For example, [[TSMC]] [[16 nm process]] is said to have 38% performance improvement at iso-power, 54% lower power at iso-speed, while achieving up 2x gate density improvement compared to its own [[28 nm process]]. It's worth pointing out that the [[figure of merit]] for the publically disclosed performance and power numbers are often based on fairly simple circuits such as a [[ring oscillator]]. It's also important to note that those numbers represent the extremes ends of the VI curves. Most circuits will find a more balanced optimization point between the two, allowing for a modest circuit shrink while enabling both performance and power reduction. | Each [[process node]] can be analyzed and characterized based on the three major components known as power, performance, and area. The three components dictate the capabilities of the integrated circuits fabricated on it. For example, [[TSMC]] [[16 nm process]] is said to have 38% performance improvement at iso-power, 54% lower power at iso-speed, while achieving up 2x gate density improvement compared to its own [[28 nm process]]. It's worth pointing out that the [[figure of merit]] for the publically disclosed performance and power numbers are often based on fairly simple circuits such as a [[ring oscillator]]. It's also important to note that those numbers represent the extremes ends of the VI curves. Most circuits will find a more balanced optimization point between the two, allowing for a modest circuit shrink while enabling both performance and power reduction. | ||
| − | === | + | === Variants === |
Sometimes PPA is expanded in a number of ways: | Sometimes PPA is expanded in a number of ways: | ||
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== See also == | == See also == | ||
| + | * [[iso- comparison]] | ||
* [[process shrink]] | * [[process shrink]] | ||
* [[technology node]] | * [[technology node]] | ||
Latest revision as of 17:20, 27 September 2023
Power-Performance-Area (PPA) are the three major components of a process technology. PPA is the overarching design point, characterizing the physical constraints and available resources of integrated circuits fabricated on that process node. Different tradeoffs between the three variables allow for different circuit optimizations.
Contents
Overview[edit]
Each process node can be analyzed and characterized based on the three major components known as power, performance, and area. The three components dictate the capabilities of the integrated circuits fabricated on it. For example, TSMC 16 nm process is said to have 38% performance improvement at iso-power, 54% lower power at iso-speed, while achieving up 2x gate density improvement compared to its own 28 nm process. It's worth pointing out that the figure of merit for the publically disclosed performance and power numbers are often based on fairly simple circuits such as a ring oscillator. It's also important to note that those numbers represent the extremes ends of the VI curves. Most circuits will find a more balanced optimization point between the two, allowing for a modest circuit shrink while enabling both performance and power reduction.
Variants[edit]
Sometimes PPA is expanded in a number of ways:
- Power-Performance-Area-Cost (PPAC) - emphasis on the cost aspect of the process
- Power-Performance-Area-Cost-Time-To-Market (PPACT) - emphasis on the cost aspect of the process and speedy time-to-market
Industry[edit]
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