(Created page with "{{amd title|EPYC Embedded 3255}} {{chip |name=EPYC Embedded 3255 |no image=Yes |designer=AMD |manufacturer=GlobalFoundries |model number=3255 |part number=PE3255BGR88AF |marke...") |
(Replaced package module by package name.) |
||
(One intermediate revision by the same user not shown) | |||
Line 11: | Line 11: | ||
|first announced= | |first announced= | ||
|first launched= | |first launched= | ||
− | | | + | |last order=2028 |
|family=EPYC Embedded | |family=EPYC Embedded | ||
|series=3000 | |series=3000 | ||
+ | |locked=Yes | ||
|frequency=2,500 MHz | |frequency=2,500 MHz | ||
+ | |turbo frequency1=3,100 MHz | ||
|turbo frequency8=3,100 MHz | |turbo frequency8=3,100 MHz | ||
|clock multiplier=25 | |clock multiplier=25 | ||
Line 23: | Line 25: | ||
|core family=23 | |core family=23 | ||
|core model=1 | |core model=1 | ||
+ | |core stepping=B2 | ||
+ | |cpuid=0x00800F12 | ||
|process=14 nm | |process=14 nm | ||
− | |transistors= | + | |transistors=4,800,000,000 |
|technology=CMOS | |technology=CMOS | ||
|die area=213 mm² | |die area=213 mm² | ||
Line 36: | Line 40: | ||
|tjunc min=-40 °C | |tjunc min=-40 °C | ||
|tjunc max=105 °C | |tjunc max=105 °C | ||
− | |package | + | |package name 1=amd,sp4r2 |
}} | }} | ||
− | '''EPYC Embedded 3255''' is a {{arch|64}} [[octa-core]] [[x86]] embedded microprocessor for dense servers and edge devices. | + | '''EPYC Embedded 3255''' is a {{arch|64}} [[octa-core]] [[x86]] embedded microprocessor designed by [[AMD]] for dense servers and edge devices. This processor has CPU cores based on the {{amd|Zen|Zen microarchitecture|l=arch}} and is fabricated on a [[GlobalFoundries]] [[14 nm#GlobalFoundries|14 nm]] process. It operates at 2.5 GHz with a {{abbr|TDP}} of 55 W and a {{amd|precision boost|turbo frequency}} of up to 3.1 GHz. This model supports a configurable TDP-down of 30 W, is distinguished from other EPYC Embedded 3000 Series processors by an [[has feature::industrial temperature range]] of -40 to 105 °C, and supports up to 512 GiB of dual-channel DDR4-2666 memory. |
== Cache == | == Cache == | ||
Line 57: | Line 61: | ||
|l3 cache=16 MiB | |l3 cache=16 MiB | ||
|l3 break=2 × 8 MiB | |l3 break=2 × 8 MiB | ||
+ | |l3 desc=16-way set associative | ||
+ | |l3 policy=write-back | ||
}} | }} | ||
Line 66: | Line 72: | ||
|controllers=2 | |controllers=2 | ||
|channels=2 | |channels=2 | ||
− | |max bandwidth= | + | |max bandwidth=42.67 GB/s |
− | |bandwidth schan= | + | |bandwidth schan=21.33 GB/s |
− | |bandwidth dchan= | + | |bandwidth dchan=42.67 GB/s |
}} | }} | ||
− | |||
− | |||
== Expansions == | == Expansions == | ||
− | The EPYC Embedded 3255 | + | The EPYC Embedded 3255 integrates two 8-port, 16-lane PCIe Gen 1/2/3 (8 GT/s) controllers. All lanes are configurable as x16/x8/x4/x2/x1 wide (e.g. 1x4 + 4x1 + 1x8) PCIe links, some lanes alternatively as SATA Gen 1/2/3 (6 Gb/s) or 10 Gbit/s Ethernet ports. Up to eight SATA ports and four GbE ports are available on this model, as well as four USB 3.1 Gen 1 (5 Gb/s) ports, and the following low speed interfaces: {{abbr|eMMC}}, {{abbr|UART}}, {{abbr|LPC}}, {{abbr|SPI/eSPI}}, {{abbr|I<sup>2</sup>C}}, {{abbr|SMBus}}, {{abbr|GPIO}}. |
{{expansions main | {{expansions main | ||
Line 86: | Line 90: | ||
|pcie config 3=x4 | |pcie config 3=x4 | ||
|pcie config 4=x2 | |pcie config 4=x2 | ||
+ | |pcie config 5=x1 | ||
}} | }} | ||
{{expansions entry | {{expansions entry | ||
Line 104: | Line 109: | ||
}} | }} | ||
− | == Features == | + | == Features == |
{{x86 features | {{x86 features | ||
|real=Yes | |real=Yes | ||
Line 123: | Line 128: | ||
|sse42=Yes | |sse42=Yes | ||
|sse4a=Yes | |sse4a=Yes | ||
+ | |sse_gfni=No | ||
|avx=Yes | |avx=Yes | ||
+ | |avx_gfni=No | ||
|avx2=Yes | |avx2=Yes | ||
|avx512f=No | |avx512f=No | ||
Line 135: | Line 142: | ||
|avx512vbmi=No | |avx512vbmi=No | ||
|avx5124fmaps=No | |avx5124fmaps=No | ||
+ | |avx512vnni=No | ||
|avx5124vnniw=No | |avx5124vnniw=No | ||
|avx512vpopcntdq=No | |avx512vpopcntdq=No | ||
+ | |avx512gfni=No | ||
+ | |avx512vaes=No | ||
+ | |avx512vbmi2=No | ||
+ | |avx512bitalg=No | ||
+ | |avx512vpclmulqdq=No | ||
|abm=Yes | |abm=Yes | ||
|tbm=No | |tbm=No | ||
Line 150: | Line 163: | ||
|clmul=Yes | |clmul=Yes | ||
|f16c=Yes | |f16c=Yes | ||
+ | |bfloat16=No | ||
|tbt1=No | |tbt1=No | ||
|tbt2=No | |tbt2=No | ||
|tbmt3=No | |tbmt3=No | ||
+ | |tvb=No | ||
|bpt=No | |bpt=No | ||
|eist=No | |eist=No | ||
Line 183: | Line 198: | ||
|osguard=No | |osguard=No | ||
|intqat=No | |intqat=No | ||
+ | |dlboost=No | ||
|3dnow=No | |3dnow=No | ||
|e3dnow=No | |e3dnow=No | ||
Line 192: | Line 208: | ||
|amdtsme=Yes | |amdtsme=Yes | ||
|amdsev=Yes | |amdsev=Yes | ||
− | |rvi= | + | |rvi=No |
|smt=Yes | |smt=Yes | ||
|sensemi=Yes | |sensemi=Yes | ||
− | |xfr= | + | |xfr=No |
− | |mxfr= | + | |xfr2=No |
− | |amdpb= | + | |mxfr=No |
− | |amdpb2= | + | |amdpb=No |
+ | |amdpb2=No | ||
+ | |amdpbod=No | ||
}} | }} | ||
− | == | + | == Bibliography == |
− | * | + | * {{cite techdoc|title=Product Brief: AMD EPYC™ Embedded 3000 Family|file=3000-Family-Product-Brief.pdf|publ=AMD|pid=1887102|date=2018}} |
− | * [https://www.amd.com/en/products/specifications/embedded "Embedded Processor Specifications"]. | + | * {{cite techdoc|title=Product Brief: AMD EPYC™ Embedded 3000 Family|url=https://www.amd.com/system/files/documents/updated-3000-family-product-brief.pdf|publ=AMD|pid=1887102|rev=E|date=2019}} |
+ | * [https://www.amd.com/en/products/specifications/embedded "Embedded Processor Specifications"]. AMD.com. Retrieved October 2020. |
Latest revision as of 04:15, 24 March 2023
Edit Values | |
EPYC Embedded 3255 | |
General Info | |
Designer | AMD |
Manufacturer | GlobalFoundries |
Model Number | 3255 |
Part Number | PE3255BGR88AF |
Market | Server, Embedded |
End-of-life | 2028 (last order) |
Shop | Amazon |
General Specs | |
Family | EPYC Embedded |
Series | 3000 |
Locked | Yes |
Frequency | 2,500 MHz |
Turbo Frequency | 3,100 MHz (1 core), 3,100 MHz (8 cores) |
Clock multiplier | 25 |
CPUID | 0x00800F12 |
Microarchitecture | |
ISA | x86-64 (x86) |
Microarchitecture | Zen |
Core Name | Snowy Owl |
Core Family | 23 |
Core Model | 1 |
Core Stepping | B2 |
Process | 14 nm |
Transistors | 4,800,000,000 |
Technology | CMOS |
Die | 213 mm² |
Word Size | 64 bit |
Cores | 8 |
Threads | 16 |
Max Memory | 512 GiB |
Multiprocessing | |
Max SMP | 1-Way (Uniprocessor) |
Electrical | |
TDP | 55 W |
cTDP down | 30 W |
Tjunction | -40 °C – 105 °C |
Packaging | |
Package | SP4r2 (FC-OBGA) |
Dimension | 45 mm × 45 mm |
Pitch | 0.8 mm |
EPYC Embedded 3255 is a 64-bit octa-core x86 embedded microprocessor designed by AMD for dense servers and edge devices. This processor has CPU cores based on the Zen microarchitecture and is fabricated on a GlobalFoundries 14 nm process. It operates at 2.5 GHz with a TDP of 55 W and a turbo frequency of up to 3.1 GHz. This model supports a configurable TDP-down of 30 W, is distinguished from other EPYC Embedded 3000 Series processors by an industrial temperature range of -40 to 105 °C, and supports up to 512 GiB of dual-channel DDR4-2666 memory.
Cache[edit]
- Main article: Zen § Cache
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
|||||||||||||||||||||||||||||||||||||
|
Memory controller[edit]
Integrated Memory Controller
|
||||||||||||||
|
Expansions[edit]
The EPYC Embedded 3255 integrates two 8-port, 16-lane PCIe Gen 1/2/3 (8 GT/s) controllers. All lanes are configurable as x16/x8/x4/x2/x1 wide (e.g. 1x4 + 4x1 + 1x8) PCIe links, some lanes alternatively as SATA Gen 1/2/3 (6 Gb/s) or 10 Gbit/s Ethernet ports. Up to eight SATA ports and four GbE ports are available on this model, as well as four USB 3.1 Gen 1 (5 Gb/s) ports, and the following low speed interfaces: eMMC, UART, LPC, SPI/eSPI, I2C, SMBus, GPIO.
Expansion Options |
|||||||||||
|
Networking
|
||||
|
Features[edit]
[Edit/Modify Supported Features]
Bibliography[edit]
- "Product Brief: AMD EPYC™ Embedded 3000 Family", AMD Publ. #1887102, 2018
- "Product Brief: AMD EPYC™ Embedded 3000 Family", AMD Publ. #1887102, Rev. E, 2019
- "Embedded Processor Specifications". AMD.com. Retrieved October 2020.
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | EPYC Embedded 3255 - AMD#pcie + |
base frequency | 2,500 MHz (2.5 GHz, 2,500,000 kHz) + |
clock multiplier | 25 + |
core count | 8 + |
core family | 23 + |
core model | 1 + |
core name | Snowy Owl + |
core stepping | B2 + |
cpuid | 0x00800F12 + |
designer | AMD + |
die area | 213 mm² (0.33 in², 2.13 cm², 213,000,000 µm²) + |
family | EPYC Embedded + |
full page name | amd/epyc embedded/3255 + |
has advanced vector extensions | true + |
has advanced vector extensions 2 | true + |
has amd amd-v technology | true + |
has amd amd-vi technology | true + |
has amd secure encrypted virtualization technology | true + |
has amd secure memory encryption technology | true + |
has amd sensemi technology | true + |
has amd transparent secure memory encryption technology | true + |
has ecc memory support | true + |
has feature | industrial temperature range +, Advanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Encryption Standard Instruction Set Extension + and SenseMI Technology + |
has locked clock multiplier | true + |
has simultaneous multithreading | true + |
has x86 advanced encryption standard instruction set extension | true + |
instance of | microprocessor + |
isa | x86-64 + |
isa family | x86 + |
l1$ size | 768 KiB (786,432 B, 0.75 MiB) + |
l1d$ description | 8-way set associative + |
l1d$ size | 256 KiB (262,144 B, 0.25 MiB) + |
l1i$ description | 4-way set associative + |
l1i$ size | 512 KiB (524,288 B, 0.5 MiB) + |
l2$ description | 8-way set associative + |
l2$ size | 4 MiB (4,096 KiB, 4,194,304 B, 0.00391 GiB) + |
l3$ description | 16-way set associative + |
l3$ size | 16 MiB (16,384 KiB, 16,777,216 B, 0.0156 GiB) + |
last order | 2028 + |
ldate | 1900 + |
manufacturer | GlobalFoundries + |
market segment | Server + and Embedded + |
max cpu count | 1 + |
max junction temperature | 378.15 K (105 °C, 221 °F, 680.67 °R) + |
max memory | 524,288 MiB (536,870,912 KiB, 549,755,813,888 B, 512 GiB, 0.5 TiB) + |
max memory bandwidth | 39.74 GiB/s (40,693.283 MiB/s, 42.67 GB/s, 42,670 MB/s, 0.0388 TiB/s, 0.0427 TB/s) + |
max memory channels | 2 + |
max sata ports | 8 + |
max usb ports | 4 + |
microarchitecture | Zen + |
min junction temperature | 233.15 K (-40 °C, -40 °F, 419.67 °R) + |
model number | 3255 + |
name | EPYC Embedded 3255 + |
package | SP4r2 + |
part number | PE3255BGR88AF + |
process | 14 nm (0.014 μm, 1.4e-5 mm) + |
series | 3000 + |
smp max ways | 1 + |
supported memory type | DDR4-2666 + |
tdp | 55 W (55,000 mW, 0.0738 hp, 0.055 kW) + |
tdp down | 30 W (30,000 mW, 0.0402 hp, 0.03 kW) + |
technology | CMOS + |
thread count | 16 + |
transistor count | 4,800,000,000 + |
turbo frequency (1 core) | 3,100 MHz (3.1 GHz, 3,100,000 kHz) + |
turbo frequency (8 cores) | 3,100 MHz (3.1 GHz, 3,100,000 kHz) + |
word size | 64 bit (8 octets, 16 nibbles) + |