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|core count=8 | |core count=8 | ||
|thread count=8 | |thread count=8 | ||
− | |die size= | + | |die size=113.31mm² |
}} | }} | ||
− | '''Kirin 990 5G''' is a {{arch|64}} high-performance mobile [[ARM]] [[5G]] SoC designed by [[HiSilicon]], introduced on September 6th 2019, first appearing in the Huawei Mate 30 Pro. Fabricated on TSMC's enhanced [[7 nm process|7nm+ EUV process]], the 990 5G incorporates two [[big cores|high frequency]] {{armh|Cortex-A76|l=arch}} cores operating at 2.86 GHz along with two [[big cores|medium frequency]] {{armh|Cortex-A76|l=arch}} cores operating at 2.36 GHz along with four {{armh|Cortex-A55|l=arch}} cores operating at up to 1.95 GHz. | + | '''Kirin 990 5G''' is a {{arch|64}} high-performance mobile [[ARM]] [[5G]] SoC designed by [[HiSilicon]], introduced on September 6th 2019, first appearing in the Huawei Mate 30 Pro 5G. Fabricated on TSMC's enhanced [[7 nm process|7nm+ EUV process]], the 990 5G incorporates two [[big cores|high frequency]] {{armh|Cortex-A76|l=arch}} cores operating at 2.86 GHz along with two [[big cores|medium frequency]] {{armh|Cortex-A76|l=arch}} cores operating at 2.36 GHz along with four {{armh|Cortex-A55|l=arch}} cores operating at up to 1.95 GHz. |
The 5G model of the Kirin 990 is one of the first SoC that fully integrates a 5G modem ([[Balong 5000]]) in the same silicon as the CPU and the GPU. The Kirin 990 5G includes a limited version of the Balong 5000 modem that supports Sub-6-GHz frequency but no mmWave (commonly used in the USA). | The 5G model of the Kirin 990 is one of the first SoC that fully integrates a 5G modem ([[Balong 5000]]) in the same silicon as the CPU and the GPU. The Kirin 990 5G includes a limited version of the Balong 5000 modem that supports Sub-6-GHz frequency but no mmWave (commonly used in the USA). | ||
− | There | + | There is a [[Kirin 990 4G]] Version, including the Balong 765 with 4G LTE (3GPP Rel. 14) in the SoC. |
The Kirin 990 5G supports up to 2.3 Gbps download and up to 1.25 Gbps upload speed and supports LPDDR4X-4266 memory. | The Kirin 990 5G supports up to 2.3 Gbps download and up to 1.25 Gbps upload speed and supports LPDDR4X-4266 memory. | ||
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|controllers=1 | |controllers=1 | ||
|channels=4 | |channels=4 | ||
− | |width= | + | |width=64 bit |
|max bandwidth=31.78 GiB/s | |max bandwidth=31.78 GiB/s | ||
|bandwidth dchan=15.89 GiB/s | |bandwidth dchan=15.89 GiB/s | ||
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| max displays = 2 | | max displays = 2 | ||
| max memory = | | max memory = | ||
− | | frequency = | + | | frequency = 600 MHz |
| max frequency = | | max frequency = | ||
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| opengl es ver = 3.2 | | opengl es ver = 3.2 | ||
| openvg ver = 1.1 | | openvg ver = 1.1 | ||
− | | opencl ver = | + | | opencl ver = 2.0 |
− | | vulkan ver = 1. | + | | vulkan ver = 1.1 |
}} | }} | ||
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== Utilizing devices == | == Utilizing devices == | ||
− | * [[used by::Huawei Mate 30 Pro]] | + | * [[used by::Huawei Mate 30 5G]] |
+ | * [[used by::Huawei Mate 30 Pro 5G]] | ||
+ | * [[used by::Huawei Mate 30 RS Porche Design]] | ||
+ | * [[used by::Huawei P40]] | ||
+ | * [[used by::Huawei P40 Pro]] | ||
+ | * [[used by::Huawei P40 Pro+]] | ||
+ | * [[used by::Honor V30 Pro]] | ||
+ | * [[used by::Huawei MatePad Pro 5G (2020)]] | ||
+ | * [[used by::Honor 30 Pro]] | ||
+ | * [[used by::Honor 30 Pro+]] | ||
== Bibliography == | == Bibliography == | ||
* Huawei Kirin 990 Keynote, 2019 IFA | * Huawei Kirin 990 Keynote, 2019 IFA |
Latest revision as of 06:32, 26 May 2022
Edit Values | |
Kirin 990 5G | |
General Info | |
Designer | HiSilicon, ARM Holdings |
Manufacturer | TSMC |
Model Number | 990 5G |
Market | Mobile |
Introduction | September 6, 2019 (announced) September 6, 2019 (launched) |
General Specs | |
Family | Kirin |
Frequency | 2,860 MHz, 2,360 MHz, 1,950 MHz |
Microarchitecture | |
ISA | ARMv8 (ARM) |
Microarchitecture | Cortex-A76, Cortex-A55 |
Core Name | Cortex-A76, Cortex-A55 |
Process | 7 nm+ EUV |
Transistors | 10,300,000,000 |
Technology | CMOS |
Die | 113.31mm² 10.68 × 10.61 |
Word Size | 64 bit |
Cores | 8 |
Threads | 8 |
Kirin 990 5G is a 64-bit high-performance mobile ARM 5G SoC designed by HiSilicon, introduced on September 6th 2019, first appearing in the Huawei Mate 30 Pro 5G. Fabricated on TSMC's enhanced 7nm+ EUV process, the 990 5G incorporates two high frequency Cortex-A76 cores operating at 2.86 GHz along with two medium frequency Cortex-A76 cores operating at 2.36 GHz along with four Cortex-A55 cores operating at up to 1.95 GHz.
The 5G model of the Kirin 990 is one of the first SoC that fully integrates a 5G modem (Balong 5000) in the same silicon as the CPU and the GPU. The Kirin 990 5G includes a limited version of the Balong 5000 modem that supports Sub-6-GHz frequency but no mmWave (commonly used in the USA).
There is a Kirin 990 4G Version, including the Balong 765 with 4G LTE (3GPP Rel. 14) in the SoC.
The Kirin 990 5G supports up to 2.3 Gbps download and up to 1.25 Gbps upload speed and supports LPDDR4X-4266 memory.
Contents
Overview[edit]
Introduced at the 2019 IFA, the Kirin 990 uses the same ARM cortex (Cortex A76 + Cortex A55) versions as its predecessor, the Kirin 980, but the clock frequencies have been increased thanks to TSMC's more advanced manufacturing method, the 7nm+ EUV node: The 990 features two high-performance big Cortex-A76 core operating at 2.86 GHz, 2 medium-performance big Cortex-A76 operating at 2.36 GHz, and four little Cortex-A55 cores operating at 1.95 GHz. Compared to the 980, the 990 5G features between 10% - 35% power efficiency due to the 2nd generation of 7nm process node. The 990 ballooned to over 50% more transistors from 6.9 billion in the 980 to 10.3 billion. The 990 incorporates an in-house developed DaVinci NPU dual-neural processor designed for AI acceleration.
Cache[edit]
- Main articles: Cortex-A55 § Cache and Cortex-A76 § Cache
For the Cortex-A76:
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Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
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For the Cortex-A55:
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Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
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Memory controller[edit]
The Kirin 990 supports 4-channel LPDDR4X up to 4266 MHz. Each channel supports at most two ranks.
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Integrated Memory Controller
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Graphics[edit]
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Integrated Graphics Information
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Wireless[edit]
- 5G NR Modem
- DL: Up to User Equipment (UE) category 21
- Downlink of up to 1.4 Gbps (4x4 MIMO + 256QAM 3CC CA = 1.2 Gbps, 2x2 MIMO + 256QAM + 1CC = 200 Mbps)
- UL: Up to User Equipment (UE) category 18
- Uplink of up to 200 Mbps (2x2 MIMO, 256-QAM, 1x20MHz CA)
- DL: Up to User Equipment (UE) category 21
- Wi-Fi 802.11 ac
- Bluetooth 5
- NFC
- GPS / A-GPS / GLONASS / BDS
Utilizing devices[edit]
- Huawei Mate 30 5G
- Huawei Mate 30 Pro 5G
- Huawei Mate 30 RS Porche Design
- Huawei P40
- Huawei P40 Pro
- Huawei P40 Pro+
- Honor V30 Pro
- Huawei MatePad Pro 5G (2020)
- Honor 30 Pro
- Honor 30 Pro+
Bibliography[edit]
- Huawei Kirin 990 Keynote, 2019 IFA
- all microprocessor models
- microprocessor models by hisilicon
- microprocessor models by hisilicon based on cortex-a76
- microprocessor models by hisilicon based on cortex-a55
- microprocessor models by arm holdings
- microprocessor models by arm holdings based on cortex-a76
- microprocessor models by arm holdings based on cortex-a55
- microprocessor models by tsmc
base frequency | 2,860 MHz (2.86 GHz, 2,860,000 kHz) +, 2,360 MHz (2.36 GHz, 2,360,000 kHz) + and 1,950 MHz (1.95 GHz, 1,950,000 kHz) + |
core count | 8 + |
core name | Cortex-A76 + and Cortex-A55 + |
designer | HiSilicon + and ARM Holdings + |
die area | 113.31 mm² (0.176 in², 1.133 cm², 113,310,000 µm²) + |
die length | 10.68 mm (1.068 cm, 0.42 in, 10,680 µm) + |
die width | 10.61 mm (1.061 cm, 0.418 in, 10,610 µm) + |
family | Kirin + |
first announced | September 6, 2019 + |
first launched | September 6, 2019 + |
full page name | Kirin 990 + |
has ecc memory support | false + |
instance of | microprocessor + |
integrated gpu | Mali-G76 + |
integrated gpu base frequency | 600 MHz (0.6 GHz, 600,000 KHz) + |
integrated gpu designer | ARM Holdings + |
integrated gpu execution units | 16 + |
isa | ARMv8 + |
isa family | ARM + |
l1$ size | 512 KiB (524,288 B, 0.5 MiB) + and 256 KiB (262,144 B, 0.25 MiB) + |
l1d$ size | 256 KiB (262,144 B, 0.25 MiB) + and 128 KiB (131,072 B, 0.125 MiB) + |
l1i$ size | 256 KiB (262,144 B, 0.25 MiB) + and 128 KiB (131,072 B, 0.125 MiB) + |
l2$ size | 2 MiB (2,048 KiB, 2,097,152 B, 0.00195 GiB) + and 0.5 MiB (512 KiB, 524,288 B, 4.882812e-4 GiB) + |
ldate | September 6, 2019 + |
manufacturer | TSMC + |
market segment | Mobile + |
max memory bandwidth | 31.78 GiB/s (32,542.72 MiB/s, 34.124 GB/s, 34,123.515 MB/s, 0.031 TiB/s, 0.0341 TB/s) + |
max memory channels | 4 + |
microarchitecture | Cortex-A76 + and Cortex-A55 + |
model number | 990 5G + |
name | Kirin 990 5G + |
supported memory type | LPDDR4X-4266 + |
technology | CMOS + |
thread count | 8 + |
transistor count | 10,300,000,000 + |
used by | Huawei Mate 30 5G +, Huawei Mate 30 Pro 5G +, Huawei Mate 30 RS Porche Design +, Huawei P40 +, Huawei P40 Pro +, Huawei P40 Pro+ +, Honor V30 Pro +, Huawei MatePad Pro 5G (2020) +, Honor 30 Pro + and Honor 30 Pro+ + |
word size | 64 bit (8 octets, 16 nibbles) + |